QPL9503

Ultra Low-Noise, Flat Gain LNA

Data Sheet, Rev E, June 10, 2020 | Subject to change without notice

3 of 9

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®

QPL9503 Evaluation Board

Notes:

1. See Evaluation Board PCB Information section for material and stack-up.

2.

R3 (0 Ω jumper) is not shown on the schematic and may be replaced with copper trace in the target application layout.

3. All components are of 0402 size unless stated on the schematic.

4.

For TDD Applications: R1 = 20K & R2 = 0Ω

5.

For FDD Applications: R1 = 20K ‘OR’ Pin 5 tied to ground. R2 = DNP/Omitted

Bill of Material

– QPL9503 Evaluation Board

Reference Des.

Value

Description

Manuf.

Part Number

N/A

N/A

Printed Circuit Board

Qorvo

U1

n/a

Ultra Low Noise, Flat Gain LNA

Qorvo

QPL9503

R4

4.3K

Resistor, Chip, 0402, 5%, 1/16W

various

R2

20K

Resistor, chip, 0402, 5%, 1/16W

various

R1, 3

0 Ω

Resistor, Chip, 0402, 5%, 1/16W

various

L1

18 nH

Inductor, 0402, 5%, coil

Coilcraft

0402CS-18NXJL

C1

10 pF

CAP, 0402, +/-1%, 50V

Murata

GJM1555C1H100FB01D

C2

5.6 pF

CAP, 0402, +/-0.1pF, 25V

AVX

04023J6R8BBSTR

C8

0.2 pF

CAP, 0402, +/-0.05pF, 50V

Murata

GJM1555C1HR20WB01

C9

0.4 pF

CAP, 0402, +/-0.05pF, 50V

AVX

04023J0R4ABSTR

C4

1.0 uF

Cap., Chip, 0402, 10%, 10V, X5R

various

C3, C5, C6, C7

100 pF

Cap., Chip, 0402, 5%, 50V, NPO/COG

various

C3

J5

J3

J1

J2

C4

R1

U1

C7

C6

J6

J7

J4

C1

C2

C5

Q1

J2

RF

Output

J4 GND

J3 V

DD

2

3,4,6,8

7

J1

RF

Input

L1

18 nH

C2

5.6 pF

C1

10 pF

C3

100 pF

C4

1 uF

R1

0



R2

20K

J5 P

D

5

R4

4.3K

1

C8

0.2pF

C9

0.4pF

C5

100 pF

See notes 4 & 5.