LM3205 datasheet(15/18 Pages) NSC

15 / 18 page

Board Layout Considerations

The LM3205 converts higher input voltage to lower output

voltage with high efficiency. This is achieved with an

inductor-based switching topology. During the first half of the

switching cycle, the internal PMOS switch turns on, the input

voltage is applied to the inductor, and the current flows from

VDD line to the output capacitor (C2) through the inductor.

During the second half cycle, the PMOS turns off and the

internal NMOS turns on. The inductor current continues to

flow via the inductor from the device PGND line to the output

capacitor (C2).

Referring toFigure 4 , the LM3205 has two major current

loops where pulse and ripple current flow. The loop shown in

the left hand side is most important, because pulse current

shown inFigure 4 flows in this path. The right hand side is

next. The current waveform in this path is triangular, as

shown in Figure 4 . Pulse current has many high-frequency

components due to fast di/dt. Triangular ripple current also

has wide high-frequency components. Board layout and cir-

cuit pattern design of these two loops are the key factors for

reducing noise radiation and stable operation. Other lines,

such as from battery to C1(+) and C2(+) to load, are almost

DC current, so it is not necessary to take so much care. Only

pattern width (current capability) and DCR drop consider-

ations are needed.

BOARD LAYOUT FLOW (microSMD)

Minimize C1, PV

IN,

and PGND loop. These traces

should be as wide and short as possible. This is most

important.

Minimize L1, C2, SW and PGND loop. These traces also

should be wide and short. This is the second priority.

20158008

FIGURE 4. Current Loop

20158009

FIGURE 5. Evaluation Board Layout for microSMD

LM3205 Datasheet(PDF) 15 Page - National Semiconductor (TI)