AD630ADZ datasheet(12/20 Pages) AD

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AD630

Data Sheet

Rev. G | Page 12 of 20

THEORY OF OPERATION

TWO WAYS TO LOOK AT THE AD630

The functional block diagram of the AD630 (see Figure 1)

shows the pin connections of the internal functions. An

alternative architectural diagram is shown in Figure 20. In this

diagram, the individual A and B channel preamps, the switch,

and the integrator output amplifier are combined in a single op

amp. This amplifier has two differential input channels, only

one of which is active at a time.

Figure 20. Architectural Block Diagram

HOW THE AD630 WORKS

The basic mode of operation of the AD630 may be easier to

recognize as two fixed gain stages, which can be inserted into

the signal path under the control of a sensitive voltage comparator.

When the circuit is switched between inverting and noninverting

gain, it provides the basic modulation/demodulation function.

The AD630 is unique in that it includes laser wafer trimmed

thin-film feedback resistors on the monolithic chip. The

configuration shown in Figure 21 yields a gain of ±2 and can

be easily changed to ±1 by shifting RB from its ground connection

to the output.

The comparator selects one of the two input stages to complete

an operational feedback connection around the AD630. The

deselected input is off and has a negligible effect on operation.

Figure 21. AD630 Symmetric Gain (±2)

When Channel B is selected, the RA and RF resistors are

connected for inverting feedback as shown in the inverting gain

configuration diagram in Figure 22. The amplifier has sufficient

loop gain to minimize the loading effect of RB at the virtual

ground produced by the feedback connection. When the sign of

the comparator input is reversed, Input B is deselected and Input A

is selected. The new equivalent circuit is the noninverting gain

configuration shown in Figure 23. In this case, RA appears

across the op amp input terminals, but because the amplifier

drives this difference voltage to zero, the closed-loop gain is

unaffected.

The two closed-loop gain magnitudes are equal when RF/RA =

1 + RF/RB, which results from making RA equal to RFRB/(RF +

RB) the parallel equivalent resistance of RF and RB.

The 5 kΩ and the two 10 kΩ resistors on the AD630 chip can be

used to make a gain of 2 as shown in Figure 22 and Figure 23.

By paralleling the 10 kΩ resistors to make RF equal to 5 kΩ and

omitting RB, the circuit can be programmed for a gain of ±1 (as

shown in Figure 28). These and other configurations using the

on-chip resistors present the inverting inputs with a 2.5 kΩ

source impedance. The more complete AD630 diagrams show

2.5 kΩ resistors available at the noninverting inputs which can

be conveniently used to minimize errors resulting from input

bias currents.

Figure 22. Inverting Gain Configuration

Figure 23. Noninverting Gain Configuration

RA 5kΩ

2.5kΩ

10kΩ

2.5kΩ

+VS

10kΩ

SEL B

SEL A

CHANNEL STATUS B/A

–VS

5kΩ

10kΩ

5kΩ

RF 10kΩ

10kΩ

VO = –

5kΩ

10kΩ

VO = (1+

) Vi

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