Compact, High-Efficiency, Dual-Output

Step-Up and LCD Bias DC-DC Converter

10

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output voltage. In PWM mode, the MBC can supply up

to 350mA. Switching harmonics generated by the fixed-

frequency operation are consistent and easily filtered.

During PWM operation, the rising edge of the internal

clock sets a flip-flop, which turns on the N-channel

MOSFET (Figure 4). The switch turns off when the sum

of the voltage-error, slope-compensation, and current-

feedback signals trips the multi-input comparator and

resets the flip-flop; the switch remains off for the rest of

the cycle. Changes in the output voltage error signal

shift the inductor current level and modulate the MOS-

FET pulse width.

Clock-Synchronized PWM

The MAX1677 operates as a clock-synchronized cur-

rent-mode PWM when a clock signal (200kHz to

400kHz) is applied to CLK/SEL. This allows switching

harmonics to be positioned to avoid sensitive frequen-

cy bands, such as those near IF frequencies in wireless

applications.

Low Power PFM Mode

Pulling CLK/SEL low places the MAX1677 in low-power

standby mode. During standby mode, PFM operation

regulates the output voltage by transferring a fixed

amount of energy during each cycle, and then modulat-

ing the switching frequency to control the power deliv-

ered to the output. The device switches only as needed

to service the load, resulting in the highest possible effi-

ciency at light loads and an operating current of only

20µA. The MBC can supply up to 170mA when in PFM

mode (Table 1).

MAX1677

OUT

R3

10

Ω

C4

0.1

µF

POUT

LX

LCDLX

REF

FB

R2

R1

C5

0.1

µF

C1

100

µF

C2

100

µF

3.3V MAIN

BOOST OUTPUT

L2

10

µH

L1

10

µH

C3

4.7

µF

LCD BOOST OUTPUT

D2

MBR0530

LCDGND

LCDFB

GND

LCDON

CLK/SEL

ON

LCDPOL

PGND

Figure 2. LCD Converter in Positive Mode

MAX1677

OUT

R3

10

Ω

C4

0.1

µF

POUT

LX

LCDLX

REF

FB

C5

0.1

µF

C6

0.1

µF

R2

R1

C1

100

µF

C2

100

µF

3.3V MAIN

BOOST OUTPUT

L2

10

µH

L1

10

µH

C3

4.7

µF

-LCD BOOST

OUTPUT

D2

MBR0530

D3

MBR0530

LCDGND

LCDFB

GND

LCDON

CLK/SEL

ON

LCDPOL

PGND

Figure 3. LCD Converter in Negative Mode

R

S

Q

OSC

PWM-MODE

CURRENT-

LIMIT LEVEL

REF

FEEDBACK

POUT

LX

PGND

P

N

Figure 4. Controller Block Diagram in PWM Mode