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24LC16B Datasheet(PDF) 3 Page - Microchip Technology |
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24LC16B Datasheet(HTML) 3 Page - Microchip Technology |
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3 / 24 page ![]() 2018-2022 Microchip Technology Inc. and its subsidiaries DS20006054B-page 3 24LC16B TABLE 1-2: AC CHARACTERISTICS AC CHARACTERISTICS Electrical Characteristics: High (H): TA = -40°C to +150°C, VCC = +2.5V to +5.5V Param. No. Symbol Characteristic Min. Max. Units Conditions 1FCLK Clock Frequency — 400 kHz 2THIGH Clock High Time 600 — ns 3TLOW Clock Low Time 1300 — ns 4TR SDA and SCL Rise Time — 300 ns Note 1 5TF SDA and SCL Fall Time — 300 ns Note 1 6THD:STA Start Condition Hold Time 600 — ns 7TSU:STA Start Condition Setup Time 600 — ns 8THD:DAT Data Input Hold Time 0 — ns Note 2 9TSU:DAT Data Input Setup Time 100 — ns 10 TSU:STO Stop Condition Setup Time 600 — ns 11 TAA Output Valid from Clock — 900 ns Note 2 12 TBUF Bus free time: The time the bus must be free before a new transmission can start 1300 — ns 13 TOF Output Fall Time from VIH minimum to VIL Maximum 20+0.1CB 250 ns Note 1 14 TSP Input Filter Spike Suppression (SDA and SCL pins) —50 ns Note 1 and Note 3 15 TWC Write Cycle Time (byte or page) —5 ms 16 Endurance 1,000,000 — cycles +25°C, 5.5V, Page Mode (Note 4) Note 1: Not 100% tested. CB = total capacitance of one bus line in pF. 2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. 3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike suppression. This eliminates the need for a Ti specification for standard operation. 4: This parameter is not tested but ensured by characterization. |
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