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24LC16B Datasheet(PDF) 10 Page - Microchip Technology |
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24LC16B Datasheet(HTML) 10 Page - Microchip Technology |
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10 / 24 page ![]() 24LC16B DS20006054B-page 10 2018-2022 Microchip Technology Inc. and its subsidiaries 8.0 READ OPERATION Read operations are initiated in the same way as write operations, with the exception that the R/W bit of the client address is set to ‘ 1’. There are three basic types of read operations: current address read, random read and sequential read. 8.1 Current Address Read The 24LC16B contains an Address Pointer that maintains the address of the last word accessed, internally incremented by one. Therefore, if the previous access (either a read or write operation) was to address ‘ n’, the next current address read operation would access data from address n + 1. Upon receipt of the client address with R/W bit set to ‘ 1’, the 24LC16B issues an Acknowledge and transmits the 8-bit data word. The host will not acknowledge the transfer, but does generate a Stop condition and the 24LC16B discontinues transmission (Figure 8-1). 8.2 Random Read Random read operations allow the host to access any memory location in a random manner. To perform this type of read operation, the word address must first be set. This is accomplished by sending the word address to the 24LC16B as part of a write operation. Once the word address is sent, the host generates a Start condition following the Acknowledge. This terminates the write operation, but not before the internal Address Pointer is set. The host then issues the control byte again, but with the R/W bit set to a ‘ 1’. The 24LC16B will then issue an Acknowledge and transmit the 8-bit data word. The host will not acknowledge the transfer, but does generate a Stop condition and the 24LC16B will discontinue transmission (Figure 8-2). After a random Read command, the internal Address Pointer will point to the address location following the one that was just read. 8.3 Sequential Read Sequential reads are initiated in the same way as a random read, except that once the 24LC16B transmits the first data byte, the host issues an Acknowledge as opposed to a Stop condition in a random read. This directs the 24LC16B to transmit the next sequen- tially-addressed 8-bit word (Figure 8-3). To provide sequential reads, the 24LC16B contains an internal Address Pointer that is incremented by one upon completion of each operation. This Address Pointer allows the entire memory contents to be serially read during one operation. 8.4 Noise Protection The SCL and SDA inputs have Schmitt Trigger and filter circuits which suppress noise spikes to assure proper device operation, even on a noisy bus. FIGURE 8-1: CURRENT ADDRESS READ SP Bus Activity Host SDA Line Bus Activity S T O P Control byte Data Byte A C K N o A C K S T A R T 1 0 1 0 1 B2 B1 B0 Block Select bits |
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