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24LC16B Datasheet(PDF) 8 Page - Microchip Technology

Part # 24LC16B
Description  16-Kbit I2C Serial EEPROM High Temp Data Sheet
PDF  24 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

24LC16B Datasheet(HTML) 8 Page - Microchip Technology

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24LC16B
DS20006054B-page 8
 2018-2022 Microchip Technology Inc. and its subsidiaries
6.0
WRITE OPERATION
6.1
Byte Write
Following the Start condition from the host, the device
code (4 bits), the block address (3 bits) and the R/W bit,
which is a logic-low, are placed onto the bus by the host
transmitter. This indicates to the addressed client
receiver that a byte with a word address will follow once
it has generated an Acknowledge bit during the ninth
clock cycle. Therefore, the next byte transmitted by the
host is the word address and will be written into the
Address Pointer of the 24LC16B. After receiving
another Acknowledge signal from the 24LC16B, the
host device will transmit the data word to be written into
the addressed memory location. The 24LC16B
acknowledges again and the host generates a Stop
condition. This initiates the internal write cycle and,
during this time, the 24LC16B will not generate
Acknowledge signals (Figure 6-1).
6.2
Page Write
The write control byte, word address and the first data
byte are transmitted to the 24LC16B in the same way
as in a byte write. However, instead of generating a
Stop condition, the host transmits up to 16 data bytes
to the 24LC16B, which are temporarily stored in the
on-chip page buffer and will be written into memory
once the host has transmitted a Stop condition. Upon
receipt of each word, the four lower-order Address
Pointer bits, which form the byte counter, are internally
incremented by one.
The higher-order 7 bits of the word address remain
constant. If the host should transmit more than 16 bytes
prior to generating the Stop condition, the Address
Pointer will roll over and the previously received data
will be overwritten. As with the byte write operation,
once the Stop condition is received an internal write
cycle will begin (Figure 6-2).
6.3
Write Protection
The WP pin allows the user to write-protect the entire
array (000-7FF) when the pin is tied to VCC. If tied to
VSS the write protection is disabled.
FIGURE 6-1:
BYTE WRITE
FIGURE 6-2:
PAGE WRITE
Note:
Page write operations are limited to
writing bytes within a single physical page,
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size
(or ‘page-size’) and end at addresses that
are integer multiples of page size – 1. If a
page write command attempts to write
across a physical page boundary, the
result is that the data wrap around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page, as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
S
P
Bus Activity
Host
SDA Line
Bus Activity
S
T
A
R
T
S
T
O
P
Control
byte
Word
Address
Data
A
C
K
A
C
K
A
C
K
10 1 0 B2 B1 B0 0
Block
Select
bits
S
P
Bus Activity
Host
SDA Line
Bus Activity
S
T
A
R
T
Control
byte
Word
Address
Data (n)
Data (n + 15)
S
T
O
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
Data (n + 1)
B1
B2
B0
1 0 1 0
0
Block
Select
bits



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