MPC8308CVMADDA datasheet(82/95 Pages) NXP

82 / 95 page

MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 4

Freescale Semiconductor

Revision history

25 Revision history

This table summarizes a revision history for this document.

Table 63. Revision history

Rev.

Number

Date

Substantive Change(s)

12/2014

• In Table 23 and Table 24, VIL(min) is replaced with VIL(max) and VIH(max) is replaced with VIL(min)

•In Table 25, Symbol tSKRGT is updated

• Updated Figure 11

•In Table 53, removed TSEC2_TMR_RX_ESFD, TSEC2_TMR_TX_ESFD, TSEC1_TMR_RX_ESFD,

TSEC1_TMR_TX_ESFD signals

•In Table 53, added INTA signal

•In Table 53, added note 9 and note 10

•In Table 53, updated the note for eTSEC1_MDIO

•In Table 53, updated note of pin M22, N17 and P21

•In Table 57, removed 167 MHz Input Clock Frequency

• Updated Figure 53

• Updated Table 61

• Updated Table 62

10/2011

• In Section 2.1.4, “Power sequencing,” changed description.

•In Table 53, updated GPIOs pins as I/O.

•In Table 54, removed PCI Express = csb_clk/2 and csb_clk/3 options.

•In Table 61, added note 4.

02/2011

• Added NVDDJ to Note-7 in Table 1.

•In Table 2,

Added Note-2

Added NVDDJ to Note-3

Added “Extended Temperature range from -40 to 105

C, in the last row of the table

Changed “characteristic name Junction temperature” to “Operating temperature range”

•In Table 4, Note-3, changed ambient temperature to junction temperature, TJ = 105 C

•In Table 18,

tDDKHCS changed from 3.15ns to 2.5ns

tDDKHMP and tDDKHME values updated

•In Figure 6, corrected tDDKHMP & tDDKHME waveform

•In Table 53,

Y23 Package Pin Number changed from NC to VDD signal group

TSEC2_CRS is muxed with GPIO[0], shown as TSEC2_CRS/ GPIO[0]

•In Table 58, note-1, core_clk maximum operating frequency 333 MHz replaced with 400 MHz

06/2010

• In Table 4, TA = 105 replaced with TJ = 105

•In Table 8, fSYS_CLK_IN (Max) = 66 replaced with 66.67 and tSYS_CLK_IN (Min) = 15.15 replaced with 15

•In Table 53, TSEC1_TMR_RX_ESFD replaced with TSEC2_TMR_RX_ESFD

TSEC1_TMR_TX_ESFD replaced with TSEC2_TMR_TX_ESFD

TSEC0_TMR_RX_ESFD replaced with TSEC1_TMR_RX_ESFD

TSEC0_TMR_TX_ESFD replaced with TSEC1_TMR_TX_ESFD

•In Table 56, rows from 1000 to 1111 removed

•In Table 57, SPMF 5:1 Option 167 MHz added.

05/2010

Initial release

MPC8308CVMADDA Datasheet(PDF) 82 Page - NXP Semiconductors

MPC8308CVMADDA Datasheet(HTML) 82 Page - NXP Semiconductors

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