MPC5643L datasheet(16/136 Pages) NXP

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MPC5643L Microcontroller Data Sheet, Rev. 10

Introduction

NXP Semiconductors

— Individual programmable filters for each mailbox

— 8 mailboxes configurable as a 6-entry receive FIFO

— 8 programmable acceptance filters for receive FIFO

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Programmable clock source

— System clock

— Direct oscillator clock to avoid FMPLL jitter

1.5.27

FlexRay

The FlexRay module provides the following features:

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Full implementation of FlexRay Protocol Specification 2.1 Rev. A

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64 configurable message buffers can be handled

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Dual channel or single channel mode of operation, each as fast as 10 Mbit/s data rate

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Message buffers configurable as transmit or receive

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Message buffer size configurable

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Message filtering for all message buffers based on Frame ID, cycle count, and message ID

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Programmable acceptance filters for receive FIFO

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Message buffer header, status, and payload data stored in system memory (SRAM)

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Internal FlexRay memories have error detection and correction

1.5.28

Serial communication interface module (LINFlexD)

The LINFlexD module (LINFlex with DMA support) on this device features the following:

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Supports LIN Master mode, LIN Slave mode and UART mode

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LIN state machine compliant to LIN1.3, 2.0, and 2.1 specifications

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Manages LIN frame transmission and reception without CPU intervention

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LIN features

— Autonomous LIN frame handling

— Message buffer to store as many as 8 data bytes

— Supports messages as long as 64 bytes

— Detection and flagging of LIN errors (Sync field, delimiter, ID parity, bit framing, checksum and Time-out errors)

— Classic or extended checksum calculation

— Configurable break duration of up to 50-bit times

— Programmable baud rate prescalers (13-bit mantissa, 4-bit fractional)

— Diagnostic features (Loop back, LIN bus stuck dominant detection)

— Interrupt driven operation with 16 interrupt sources

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LIN slave mode features

— Autonomous LIN header handling

— Autonomous LIN response handling

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UART mode

— Full-duplex operation

— Standard non return-to-zero (NRZ) mark/space format

— Data buffers with 4-byte receive, 4-byte transmit

— Configurable word length (8-bit, 9-bit, 16-bit, or 17-bit words)

— Configurable parity scheme: none, odd, even, always 0

— Speed as fast as 2 Mbit/s

MPC5643L Datasheet(PDF) 16 Page - NXP Semiconductors

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