9.2.2 Design 2 – Inverting Buck-Boost Regulator with Negative Output Voltage

Figure 9-12 shows the schematic diagram of an inverting buck-boost (IBB) regulator with an output of –5 V at –4

A and a switching frequency of 1.2 MHz. In this example, the target half-load and full-load efficiencies are 91%

and 89.5%, respectively, based on a nominal input voltage of 24 V that ranges from 10 V to 31 V.

PG

EN

RT

PGND

AGND

VOUT1

FB

VLDOIN

VIN1

PGND

VIN2

TLVM13660

Optional

external bias

VCC

VOUT2

3

47 F

10.7 k

25.5 k

102 k

10 F

10 F

100 k

604 k

Precision

enable for

–VOUT

–VOUT

–VOUT

–VOUT

–VOUT

10 F

VOUT+

VOUT–

VIN+

VIN–

CBOOT

RBOOT

Figure 9-12. Circuit Schematic

9.2.2.1 Design Requirements

Table 9-3 shows the intended input, output, and performance parameters for this application example. With an

Table 9-3. Design Parameters

Design Parameter

Value

Input voltage range

10 V to 31 V

Input voltage UVLO turn on

8.9 V

Output voltage

–5 V

Full-load current

–4 A

Switching frequency

1.2 MHz

Output voltage regulation

±1%

Table 9-4 gives the selected buck module power-stage components with availability from multiple vendors. This

design uses an all-ceramic output capacitor implementation.

Table 9-4. List of Materials for Application Circuit 2

Ref Des

Qty

Specification

Manufacturer(1)

Part Number

3

10 µF, 50 V, X7R, 1210, ceramic

Kemet

C1210C106K5RACTU

TDK

CNA6P1X7R1H106K

2

47 µF, 10 V, X7R, 1210, ceramic

Murata

GRM32ER71A476ME15L

100 µF, 6.3 V, X7S, 1210, ceramic

Murata

GRT32EC70J107ME13L

1

TLVM13660 36-V, 6-A synchronous buck module

Texas Instruments

TLVM13660RDLR

(1)

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