INA350CDSIDDFR datasheet(8/45 Pages) TI

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7.5 Electrical Characteristics (continued)

For VS = (V+) – (V–) = 1.8 V to 5.5 V (±0.9 V to ±2.75 V) at TA = 25°C, VREF = VS/2, G = 10, 20, 30 & 50, RL = 10 kΩ

connected to VS / 2, VCM = [(VIN+) + (VIN–)] / 2 = VS / 2, VIN = (VIN+) – (VIN–) = 0 V and VOUT = VS / 2 (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

EMIRR

Electro-magnetic

interference rejection ratio

f = 1 GHz, VIN_EMIRR = 100 mV

Slew rate

VS = 5 V, VO = 2 V step

0.24

V/µs

Settling time

G = 10, To 0.1%, VS = 5.5 V, VSTEP = 2 V, CL = 10 pF

µs

G = 10, To 0.01%, VS = 5.5 V, VSTEP = 2 V, CL = 10 pF

G = 20, To 0.1%, VS = 5.5 V, VSTEP = 2 V, CL = 10 pF

G = 20, To 0.01%, VS = 5.5 V, VSTEP = 2 V, CL = 10 pF

Settling time

G = 30, To 0.1%, VS = 5.5 V, VSTEP = 2 V, CL = 10 pF

G = 30, To 0.01%, VS = 5.5 V, VSTEP = 2 V, CL = 10 pF

G = 50, To 0.1%, VS = 5.5 V, VSTEP = 2 V, CL = 10 pF

G = 50, To 0.01%, VS = 5.5 V, VSTEP = 2 V, CL = 10 pF

Overload recovery

VIN = 1 V, G = 10

µs

Overload recovery

VIN = 1 V, G = 50

6.5

µs

REFERENCE INPUT

RIN

Input impedance

kΩ

Voltage range

(V–)

(V+)

Gain to output

V/V

Reference gain error

±0.004

POWER SUPPLY

Power-supply voltage

Single-supply

1.7

5.5

Power-supply voltage

Dual-supply

±0.85

±2.75

Quiescent current

VIN = 0 V

100

125

µA

TA = –40°C to 125°C

135

IQSD

Quiescent current per

amplifier

All amplifiers disabled, SHDN = V–

0.70

1.25

µA

VIL

Logic low threshold

voltage (Gain Select)

G = 10 for INA350ABS, G = 30 for INA350CDS

(V–) + 0.2 V

VIH

Logic high threshold

voltage (Gain Select)

G = 20 for INA350ABS, G = 50 for INA350CDS

(V–) + 1 V

tON

Amplifier enable time (full

shutdown) (6)

VCM = VS / 2, VO = 0.9 × VS / 2,

RL connected to V–

100

µs

tOFF

Amplifier disable time (6)

VCM = VS / 2, VO = 0.1 × VS / 2,

RL connected to V–

µs

SHDN pin input bias

current (per pin)

(V+) ≥ SHDN ≥ (V–) + 1 V

SHDN pin input bias

current (per pin)

(V–) ≤ SHDN ≤ (V–) + 0.2 V

175

(1)

Total offset, referred-to-input (RTI): VOS = (VOSI) + (VOSO / G).

(2)

Offset drifts are uncorrelated. Input-referred offset drift is calculated using: ΔVOS(RTI) = √[ΔVOSI 2 + (ΔVOSO / G)2]

(3)

Input common mode voltage range of the just the input stage of the instrumentation amplifier. The entire INA350x input range depends

on the combination input common-mode voltage, differential voltage, gain, reference voltage and power supply voltage. Typical

Characteristic curves will be added with more information.

(4)

Min and Max values are specified by characterization.

(5)

Total RTI voltage noise is equal to: eN(RTI) = √[eNI 2 + (eNO / G)2]

(6)

Disable time (tOFF) and enable time (tON) are defined as the time interval between the 50% point of the signal applied to the SHDN pin

and the point at which the output voltage reaches the 10% (disable) or 90% (enable) level.

INA350

SBOSAA0B – NOVEMBER 2021 – REVISED APRIL 2022

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