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DS15MB200 Datasheet(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part # DS15MB200
Description  Dual 1.5 Gbps 2:1/1:2 LVDS Mux/Buffer with Pre-Emphasis
PDF  10 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DS15MB200 Datasheet(HTML) 5 Page - National Semiconductor (TI)

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Absolute Maximum Ratings (Note 6)
Supply Voltage (V
DD)
−0.3V to +4.0V
CMOS Input Voltage
-0.3V to (V
DD+0.3V)
LVDS Receiver Input Voltage
-0.3V to (V
DD+0.3V)
LVDS Driver Output Voltage
-0.3V to (V
DD+0.3V)
LVDS Output Short Circuit
Current
+40 mA
Junction Temperature
+150˚C
Storage Temperature
−65˚C to +150˚C
Lead Temperature (Solder, 4sec)
260˚C
Max Pkg Power Capacity @ 25˚C
5.2W
Thermal Resistance (
θ
JA)
24˚C/W
Package Derating above +25˚C
41.7mW/˚C
ESD Last Passing Voltage
HBM, 1.5k
Ω, 100pF
8kV
LVDS pins to GND only
15kV
EIAJ, 0
Ω, 200pF
250V
CDM
1000V
Recommended Operating
Conditions
Supply Voltage (V
CC)
3.0V to 3.6V
Input Voltage (V
I) (Note 7)
0V to V
CC
Output Voltage (V
O)
0VtoV
CC
Operating Temperature (T
A)
Industrial
−40˚C to +85˚C
Note 6: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of products outside of recommended operation conditions.
Note 7: VID max < 2.4V
Electrical Characteristics
Over recommended operating supply and temperature ranges unless other specified.
Symbol
Parameter
Conditions
Min
Typ
(Note 8)
Max
Units
LVTTL DC SPECIFICATIONS (MUX_Sn, PREA_n, PREB_n, PREL_n, ENA_n, ENB_n, ENL_n)
V
IH
High Level Input Voltage
2.0
V
DD
V
V
IL
Low Level Input Voltage
GND
0.8
V
I
IH
High Level Input Current
V
IN =VDD =VDDMAX
−10
+10
µA
I
IHR
High Level Input Current
PREA_n, PREB_n, PREL_n
40
200
µA
I
IL
Low Level Input Current
V
IN =VSS,VDD =VDDMAX
−10
+10
µA
C
IN1
Input Capacitance
Any Digital Input Pin to V
SS
2.0
pF
C
OUT1
Output Capacitance
Any Digital Output Pin to V
SS
4.0
pF
V
CL
Input Clamp Voltage
I
CL = −18 mA
−1.5
−0.8
V
LVDS INPUT DC SPECIFICATIONS (SIA±, SIB±,LI±)
V
TH
Differential Input High Threshold
(Note 9)
V
CM = 0.8V or 1.2V or 3.55V,
V
DD = 3.6V
0
100
mV
V
TL
Differential Input Low Threshold
(Note 9)
V
CM = 0.8V or 1.2V or 3.55V,
V
DD = 3.6V
−100
0
mV
V
ID
Differential Input Voltage
V
CM = 0.8V to 3.55V, VDD = 3.6V
100
2400
mV
V
CMR
Common Mode Voltage Range
V
ID = 150 mV, VDD = 3.6V
0.05
3.55
V
C
IN2
Input Capacitance
IN+ or IN− to V
SS
2.0
pF
I
IN
Input Current
V
IN = 3.6V, VDD =VDDMAX or 0V
−15
+15
µA
V
IN = 0V, VDD =VDDMAX or 0V
−15
+15
µA
LVDS OUTPUT DC SPECIFICATIONS (SOA_n±, SOB_n±, LO_n±)
V
OD
Differential Output Voltage,
0% Pre-emphasis (Note 9)
R
L is the internal 100
Ω between OUT+
and OUT−
250
360
500
mV
∆V
OD
Change in V
OD between
Complementary States
-35
35
mV
V
OS
Offset Voltage (Note 10)
1.05
1.22
1.475
V
∆V
OS
Change in V
OS between
Complementary States
-35
35
mV
I
OS
Output Short Circuit Current
OUT+ or OUT− Short to GND
−21
-40
mA
C
OUT2
Output Capacitance
OUT+ or OUT− to GND when
TRI-STATE
4.0
pF
www.national.com
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