CD PLAYER DIGITAL SIGNAL PROCESSOR WITH BUILT-IN DAC

MITSUBISHI SOUND PROCESSOR ICs

M65824AFP

ELECTRIC

MITSUBISHI

/23

10-4. EFM - PLL circuit

(1) Data slicing / PLL

The M65824AFP has an analog front -end for incoming HF (EFM) signal. Using CMOS - Analog

technology , the front - end is comprised of an automatic slice level control circuit and EFM - PLL

ci rcuit with internal adjust - free VCO. Under figure shows a block - diagram of the analog front - end.

The HF signal is sliced by the HF comparator and a DC level is feed back from TLC to HF through some

the external CR. If HFD becomes "H" because of defect in disk, then TLC becomes off state and holds

the DC level. EFM -PLL is for extracting the EFM clock signal from the HF signal. The PLL circuit has a

phase / frequency comparator so the M65824AFP has a wide capture / lock range and there is no need

to adjust the VCO. LPF is the charge- pump output and same - time control voltage input to the VCO.

LPF becomes off state if HFD becomes "H".

IREF is the reference current input used to determine the current of charge pumps of TLC and LPF,

operating point of HF comparator , and VCO free running frequency.

If IREF is connected to a noisy power supply through a resistor , the VCO would be modulated and the

error - rate would increase. Therefore , power supply noise at IREF must be held to a minimum.

14

TLC

LPF

VCO

HF comparator

HFD

IREF

HF

signal

HF comparator

change-

pump

phase

Det.

change-

pump

change-

pump

1/2

VCO

Low freq

limiter

Timer

Freq.

Det

Async frame

counter

Sync protection

block

EFM

Data

EFM

Clock

to EFM

demodulator

Current

source

control

TLC

LPF

Vref