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IPS2550 Datasheet(PDF) 28 Page - Renesas Technology Corp |
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IPS2550 Datasheet(HTML) 28 Page - Renesas Technology Corp |
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28 / 53 page ![]() IPS2550 Datasheet © 2022 Renesas Electronics Corporation 28 June 20, 2022 14.3.3 Offset and Gain Matching After the signals are filtered, the RF signal is corrected for a possible offset and amplitude mismatch, originating from imperfect coil designs. The amount of offset and fine gain correction can be user programmed to a fixed value in the NVM or corrected on-the-fly in embedded applications; see section 15.1 for further details. 14.3.4 Demodulation The time-continuous demodulator removes the carrier from the input signal, generating the demodulated LF signal. 14.3.5 Automatic Gain Control (AGC) The signal magnitude strength of the demodulated signal, M = √Vsin2+V cos2, is permanently monitored and compared against a nominal range, which is programmable in two options (see Table 11). The AGC will automatically adjust the receiver gain to bring the output signal magnitude into the “no-switching zone” . The AGC can also be enabled to generate an alarm if the receiver gain is outside a programmable range, for example to indicate that the receiver input signals are too strong or too weak. Figure 12. AGC Magnitude ranges See Table 11 for detailed levels AGC will decrease gain if signal magnitude is in this zone Output signal magnitude AGC will increase gain if signal magnitude is in this zone no-switching-zone VMAGCxW 14.4 Signal Channel Swapping An effective method to improve the detection of internal gain errors is a Renesas patent-pending signal channel swapping feature, available as a configuration option. When enabled, the chip periodically swaps the sine and cosine signal channels between the two analog signal paths. By applying this method, any gain mismatch between sine and cosine signal channels is immediately detectable at the analog signal outputs, even in static (non-rotating) operation. 14.5 Output Buffers The four analog signals (sine, inverted sine, cosine and inverted cosine) are individually buffered at the corresponding output pins. The buffer outputs are over-voltage and reverse-polarity protected and checked for shorts to ground, shorts to VDD, or common-mode voltage disruption. In the diagnostic state, if enabled, the buffers are turned off, allowing diagnostics indication by the external MCU through external pull-up or pull-down resistors. |
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