OPA992 datasheet(9/70 Pages) TI

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6.7 Electrical Characteristics

For VS = (V+) – (V–) = 2.7 V to 40 V (±1.35 V to ±20 V) at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT

= VS / 2, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

OFFSET VOLTAGE

VOS

Input offset voltage

VCM = V–

±0.21

±1

TA = –40°C to 125°C

±1.2

dVOS/dT

Input offset voltage drift

VCM = V–

TA = –40°C to 125°C

±0.25

µV/

℃

PSRR

Input offset voltage versus

power supply

OPA992, OPA2992, VCM =

V–, VS = 5 V to 40 V

TA = –40°C to 125°C

±0.2

±1.3

μV/V

OPA4992, VCM = V–, VS = 5

V to 40 V

±0.4

±1.8

OPA992, OPA2992,

OPA4992, VCM = V–, VS =

2.7 V to 40 V(1)

±0.8

±7

DC channel separation

0.4

µV/V

INPUT BIAS CURRENT

Input bias current

±10

IOS

Input offset current

±10

NOISE

Input voltage noise

f = 0.1 Hz to 10 Hz

2.77

μVPP

0.49

µVRMS

Input voltage noise density

f = 1 kHz

nV/√Hz

f = 10 kHz

4.4

Input current noise density f = 1 kHz

fA/√Hz

INPUT VOLTAGE RANGE

VCM

Common-mode voltage

range

(V–)

(V+)

CMRR

Common-mode rejection

ratio

VS = 40 V, V– < VCM < (V+) –

2 V (PMOS pair)

TA = –40°C to 125°C

100

115

VS = 5 V, V– < VCM < (V+) – 2

V (PMOS pair)(1)

VS = 2.7 V, V– < VCM < (V+) –

2 V (PMOS pair)

VS = 2.7 – 40 V, (V+) – 1 V <

VCM < V+ (NMOS pair)

(V+) – 2 V < VCM < (V+) – 1 V

See Offset Voltage vs Common-Mode

Voltage (Transition Region)

INPUT IMPEDANCE

ZID

Differential

100 || 9

MΩ || pF

ZICM

Common-mode

6 || 1

TΩ || pF

OPEN-LOOP GAIN

AOL

Open-loop voltage gain

VS = 40 V, VCM = VS / 2,

(V–) + 0.1 V < VO < (V+) –

0.1 V

120

142

VS = 40 V, VCM = VS / 2,

(V–) + 0.12 V < VO < (V+) –

0.12 V

TA = –40°C to 125°C

142

VS = 5 V, VCM = VS / 2,

(V–) + 0.1 V < VO < (V+) –

0.1 V(1)

104

125

TA = –40°C to 125°C

125

VS = 2.7 V, VCM = VS / 2,

(V–) + 0.1 V < VO < (V+) –

0.1 V(1)

105

TA = –40°C to 125°C

105

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OPA992, OPA2992, OPA4992

SBOSA10D – JUNE 2021 – REVISED AUGUST 2022

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