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F0440 Datasheet(PDF) 3 Page - Renesas Technology Corp |
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F0440 Datasheet(HTML) 3 Page - Renesas Technology Corp |
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3 / 29 page ![]() F0440 Datasheet © 2021 Renesas Electronics Corporation 3 November 4, 2021 Pin Descriptions Table 2. Pin Descriptions Number Name Description 1 RFin_A RF Path A input internally matched to 50Ω. Must use external DC block. 2, 8, 15, 16, 17, 29, 30, 31 GND Ground these pins. 3 VCTRL0_A 1bit DSA0 6dB attenuator control for path A 4 SPI Data[a] Data input: 3.3V or 1.8V CMOS compatible. 5 SPI Clk[a] Clock input: 3.3V or 1.8V CMOS compatible. 6, 21, 23, 25 VCC +5V Power Supply. Use bypass capacitors as close to pin as possible. 7 VCTRL0_B 1bit DSA0 6dB attenuator control for path B 9 RFin_B RF Path B input internally matched to 50Ω. Must use external DC block. 10, 18, 20, 26, 28, 36 NC No internal connection. Can be either left open or connected to GND (recommended) 11 SPI CSb_B[a] Chip Select bar input path B: 3.3V or 1.8V CMOS compatible. Logic LOW shifts data. 12 STBY_B Standby (Low/Open = device power ON, High = device power OFF with SPI still powered ON). A pull- down resistor connects between input and GND. 13 VCTRL1_B See separate attenuation logic table for Path B DSA2. 14 VCTRL2_B See separate attenuation logic table for Path B DSA2. 19 RFout_B RF output Path B. Use external DC block as close to the pin as possible. 22 RDset Connect external resistor to GND to optimize amplifier bias. Used with pin 24. 24 Rset Connect external resistor to GND to optimize amplifier bias. Used with pin 22. 27 RFout_A RF output Path A. Use external DC block as close to the pin as possible. 32 VCTRL2_A See separate attenuation logic table for Path A DSA2. 33 VCTRL1_A See separate attenuation logic table for Path A DSA2. 34 STBY_A Standby (Low/Open = device power ON, High = device power OFF with SPI still powered ON). A pull- down resistor connects between input and GND. 35 SPI CSb_A[a] Chip Select bar input path A: 3.3V or 1.8V CMOS compatible. Logic LOW shifts data. EP Exposed Pad. Internally connected to GND. Solder this exposed pad to a PCB pad that uses multiple ground vias to provide heat transfer out of the device into the PCB ground planes. These multiple ground vias are also required to achieve the noted RF performance. a. See Serial Control Mode section for description. |
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