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LTC9101-3/LTC9103

Rev. 0

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APPLICATIONS INFORMATION

Current Cutoff and Limit

Each LTC9101-3/LTC9103 port includes two current limit-

ing thresholds (ICUT and ILIM), each with a corresponding

timer (tCUT and tLIM). The thresholds are set based on the

classification result as shown in Table 3.

Per the IEEE specification, the LTC9101-3/LTC9103 allows

the port current to exceed ICUT for a limited period of

time before removing power from the port, whereas it will

actively control the MOSFET gate drive to keep the port

current below ILIM. The port does not take any action to

limit the current when only the ICUT threshold is exceeded,

but does start the tCUT timer. If the current drops below

the ICUT current threshold before its timer expires, the

tCUT timer counts back down, but at 1/16 the rate that it

counts up. If the tCUT timer reaches 65ms (typical) the

port is turned off and the port. This allows the current

limit circuitry to tolerate intermittent overload signals with

duty cycles below about 6%; longer duty cycle overloads

will turn the port off.

The ILIM current limiting circuit is always enabled and

actively limiting port current. The tLIM timer starts when

the ILIM threshold is exceeded. When the tLIM timer

reaches 15ms (typical) the port is turned off. The current

limit timer threshold is reconfigurable by way of embed-

ded flash configuration.

ILIM Foldback

The LTC9101-3/LTC9103 ILIM threshold is implemented as

a two-stage foldback circuit that reduces the port current if

the port voltage falls below the normal operating voltage.

This keeps MOSFET power dissipation at safe levels.

MOSFET Fault Detection

LTC9101-3/LTC9103 PSE ports are designed to tolerate

significant levels of abuse, but in extreme cases it is pos-

sible for an external MOSFET to be damaged. A failed

MOSFET may short source to drain, which will make the

port appear to be on when it should be off; this condition

may also cause the sense resistor to fuse open, turning

off the port but causing SENSE to rise to an abnormally

high voltage. A failed MOSFET may also short from gate to

drain, causing GATE to rise to an abnormally high voltage.

OUT, SENSE and GATE are designed to tolerate up to 80V

faults without damage.

If the LTC9101-3/LTC9103 detects any of these conditions

for more than 4ms (typical), it disables all functionality on

the affected port, reduces the gate drive pull-down cur-

rent MOSFET. This is typically a permanent fault, but the

user can attempt to recover by resetting the entire chip.

If the MOSFET is in fact bad, the port will disable itself

again. The remaining ports of the LTC9101-3/LTC9103

are unaffected.

Disconnect

The LTC9101-3/LTC9103 monitors powered ports to

ensure the PD continues to draw the minimum specified

current. A disconnect timer counts up whenever port cur-

rent is below 7mA (VHOLD typ), indicating that the PD has

been disconnected. If the tDIS timer expires, the port will

be turned off. If the current returns before the tDIS timer

runs out, the timer resets. As long as the PD exceeds the

minimum current level more often than tDIS, the port will

remain powered.

The LTC9101-3/LTC9103 does not include AC disconnect

circuitry.

Fast Surge Recovery

High reliability systems demand excellent surge recovery.

It is increasingly important for a PSE to minimize power

disruption to the PDs during extreme power transients.

Furthermore, PDs that do not meet minimum bulk capac-

itance requirements are particularly vulnerable to power

brownouts with traditional PSE solutions. The LTC9101-3/

LTC9103 provides industry-leading hot swap responsive-

ness with excellent recovery from surge events.

During a surge event, the LTC9103 GATE pin quickly turns

off the external MOSFET current flow to protect the PSE,

the MOSFET, and downstream circuitry.

As the surge dissipates, the LTC9103 quickly turns the

MOSFET back on in a safe, current limited manner while

minimizing power disruption to the PD. The LTC9103 fast

MOSFET turn off and power recovery better support both

IEEE compliant PDs and PDs with lower bulk capacitance

in high reliability applications.

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