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NCV7705 Datasheet(PDF) 21 Page - ON Semiconductor |
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NCV7705 Datasheet(HTML) 21 Page - ON Semiconductor |
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21 / 38 page ![]() NCV7705(A), NCV7706 www.onsemi.com 21 Diagnostic Functions All diagnostic functions (overcurrent, underload, power supply monitoring, thermal warning and thermal shutdown) are internally filtered. The failure condition has to be valid for the minimum specified filtering time (td_old, td_uld, td_uvov and td_tx) before the corresponding status bit in the status register is set. The filter function is used to improve the noise immunity of the device. The undercurrent and temperature warning functions are intended for information purpose and do not affect the state of the output drivers. An overcurrent condition disables the corresponding output driver while a thermal shutdown event disables all outputs into high impedance state. Depending on the setting of the overcurrent recovery bits in the input register, the driver can either perform an auto−retry or remain latched off until the microcontroller clears the corresponding status bits. Overtemperature shutdown is latch−off only, without auto−retry functionality. Overvoltage / Undervoltage Shutdown If the supply voltage Vs rises above the switch off voltage Vov_vs(off) or falls below Vuv_vs(off), all output transistors are switched to high−impedance state and the global status bit UOV_OC (multi information) is set. The status flag STATUS_2.VSOV, resp. STATUS_2.VSUV is set, too, to log the over−/under−voltage event. The bit CONTROL_3.OVUVR can be used to determine the recovery behavior once the Vs supply voltage gets back into the specified nominal operating range. OVUVR = 0 enables auto−recovery, with OVUVR = 1 the output stages remain in high impedance condition until the status flags have been cleared. Once set, STATUS2.VSOV / VSUV can only be reset by a read&clear access to the status register STATUS_2. Thermal Warning and Overtemperature Shutdown The device provides a dual−stage overtemperature protection. If the junction temperature rises above Tjtw_on, a temperature warning flag (TW) is set in the Global Status Byte and can be read via SPI. The control software can then react onto this overload condition by a controlled disable of individual outputs. If however the junction temperature reaches the second threshold Tjsd_on, the thermal shutdown bit TSD is set in the Global Status Byte and all output stages are switched into high impedance state to protect the device. The minimum shutdown delay for overtemperature is td_tx. The output channels can be re−enabled after the device cooled down and the TSD flag has been reset by the microcontroller by setting CONTROL_0.MODE = 0. Openload (Underload) Detection The openload detection monitors the load current in the output stage while the transistor is active. If the load current is below the openload detection threshold for at least td_uld, the corresponding bit (ULDx) is set in the status registers STATUS_1/2. The status of the output remains unchanged. Once set, ULDx remains set regardless of the actual load condition. It has to be reset by a read&write access to the corresponding status register. Overload Detection An overcurrent condition is indicated by the flag (UOV_OC) in the Global Status Byte after a filter time of at least td_old. The channel dependent overcurrent flags are set in the status registers (STATUS_0/2.OCx) and the corresponding driver is switched into high impedance state to protect the device. Each low−side and high−side driver stage provides its own overcurrent flag. Resetting this overcurrent flag automatically re−enables the respective output (provided it is still enabled thru the Control register). If the over current recovery function is enabled, the internal chip logic automatically resets the overcurrent flag after a fixed delay time, generating a PWM modulated current with a programmable duty cycle. Otherwise the status bits have to be cleared by the microcontroller by a read&clear access to the corresponding status register. Cross−current Protection All six half−bridges are protected against cross−currents by internal circuitry. If one driver is turned off (LS or HS), the activation of the other driver of the same output will be automatically delayed by the cross current protection mechanism until the active driver is safely turned off. Mode Control Wake−up and Mode Control Two different modes are available: • Active mode • Standby mode After power−up of VCC the device starts in Standby mode. Pulling the chip−select signal CSB to low level causes the device to change into Active mode (analog part active). After at least 10 ms delay, the first SPI communication is valid and bit CONTROL_0.MODE can be used to set the desired mode of operation. If bit MODE remains reset (0) or CSB remains low longer than tcsb_low_stdby, the device returns to the Standby mode after an internal delay of max. 8 ms, clearing all register content and setting all output stages into high impedance state. |
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