DPS1113

Document number: DS39544 Rev. 7 - 2

13 of 16

www.diodes.com

November 2019

© Diodes Incorporated

DPS1113

Application Information (continued)

Discharge Function

To facilitate the various applications envisioned by the system designers, the input or output port can be discharged via two external controls:

DISC1, DISC2. The internal discharge resistor at each port is approximately 10

0Ω. The discharge paths are OFF by default with an internal 1MΩ

pull-down resistor between DISC1 (or DISC2) and GND. The settings are shown in the following table.

DISC1

DISC2

Description

0

0

Discharge function disabled

0

1

OUT port is being discharged until the pin DISC2 is pulled low

1

0

IN port is being discharged until the pin DISC1 is pulled low

1

1

Both IN and OUT ports are discharged simultaneously

Schottky Diode for Protection of Current Surge

When a cable is hot plugged in/out of the USB Type-C connector behind where the OUT port of the DPS1113 is connected, a large ground current

can be seen at the OUT port of the DPS1113. When the far end of a connected cable is short to ground for whatever reason, the OUT port of the

DPS1113 can also detect a large ground current. With the Schottky diode, SBR3U40P1, populated as close as possible to the USB Type-C

connector, no ground current can go through the DPS1113 to cause false operation.

Printed Circuit Board (PCB) Layout Consideration

1.

Place the input/output capacitors CIN and COUT as close as possible to the IN and OUT pins.

2.

The power traces (VIN trace and the VOUT trace), including the power ground, is kept direct, short and wide.

3.

Place the resistors and capacitors (RVLIM, RILIM, RIMON, CIMON, CDV/DT and CVREG) near the device pins.

4.

Connect the signal ground to the GND pin, and keep a single connection from GND pin to the power ground behind the input or output

capacitors.

5.

For better power dissipation, via holes are recommended to connect the expos

ed pad’s landing area to a large copper polygon on the other

side of the printed circuit board. The copper polygons and exposed pad of SRC (common source nodes of internal power MOSFET) must

not be connected to any of the signal and power grounds on the PCB.

GND (Power)

RVLIM

CIN

COUT

RILIM

CDV/DT

CVREG

VOUT

VIN

2

1

3

4

5

6

SRC

16

17

15

14

13

12

IN

IN

IN

EN

FRS

GND

OUT

OUT

OUT

VLIM

ILIM

DV/DT

SRC Copper Ploygon

Not connected to GND

GND (Signal)

RIMON

DOUT

CIMON

Figure 3. Suggested PCB Layout