SigmaTel, Inc.
Data Sheet
STAC9721
5
04/07/00
04/07/00
Figure 2. STAC9721/23 Block Diagram
The STAC9721/23 block diagram is illustrated above. It performs fixed 48K sample rate D-A & A-D
conversion, mixing, and analog processing. The digital interface communicates with the AC'97 controller
via the five wire AC-Link and contains the 64 word by 16-bit registers. Two, fixed 48Ks/s DAC’s
support two stereo PCM-out channels. The digital mix of all software sources, including the internal
synthesizer and any other digital sources, is performed in the digital controller. The Mixer block mixes
the PCM_OUT with any analog sources, then outputs to LINE_OUT and LNLVL_OUT.
The
MONO_OUT delivers either mic only or a mono mix of sources from the mixer. The two fixed 48Ks/s
ADC’s take any mix of mono or stereo sources and convert it to a stereo PCM-in signal. All ADC's and
DAC's operate at 18-bit resolution.
The STAC9721/23 is designed primarily to support stereo, 2-speaker audio. However, true AC-3
playback can be achieved for 6-speaker applications by taking advantage of the multi-codec option in the
STAC9721/23. Using this option with a STAC9704/07/21/23 or the 4-channel STAC9708 as the primary
codec, and the STAC9721/23 as the secondary codec, 6-channel output can be achieved in an AC'97
architecture. Also, the STAC9721/23 provides for a stereo enhancement feature, SigmaTel Surround 3D
or SS3D. SS3D provides the listener with several options to expand the soundstage beyond the normal 2-
speaker arrangement.
Together, with the logic component (controller or advanced core logic chip-set) of AC'97, the
STAC9721/23 can be SoundBlaster and Windows Sound System compatible. SoundBlaster is a
registered trademark of Creative Labs. Windows is a registered trademark of Microsoft Corporation.
LINE_OUT
MONO_OUT
MIC1
MIC2
M
U
X
MIXER
Analog mixing
and
Gain control
DAC
DAC
ADC
ADC
Power
Management
Digital
Interface
Registers
64 x 16 bits
Mic
Boost
0/20 dB
PCM out DACs
PCM in ADCs
AC-link
4 stereo
sources
2 mono sources
mono
stereo
48Kss
48Kss
SYNC
BIT_CLK
SDATA_OUT
SDATA_IN
RESET
LNLVL_OUT
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