TMUX7348F datasheet(3/60 Pages) TI

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5 Device Comparison Table

PRODUCT

DESCRIPTION

TMUX7348F

+60 V/ –60 V tolerant, fault-protected, latch-up immune, single-ended 8:1 multiplexers with adjustable fault threshold

TMUX7349F

+60 V/ –60 V tolerant, fault-protected, latch-up immune, dual 4:1 multiplexers with adjustable fault threshold

6 Pin Configuration and Functions

VSS

GND

VDD

VFN

VFP

Not to scale

Figure 6-1. PW Package, 20-Pin TSSOP (Top View)

VSS

VDD

Not to scale

Thermal

Pad

Figure 6-2. RTJ Package, 20-Pin WQFN (Top View)

Table 6-1. Pin Functions: TMUX7348F

TYPE(1)

DESCRIPTION

NAME

TSSOP

WQFN

Logic control input address 0 (A0). The pin has a 4-MΩ internal pull-down resistor. This pin can

also be used together with the specific fault pin (SF) to indicate which input is under fault. For more

details, see Section 9.4.3.

Logic control input address 1 (A1). The pin has a 4-MΩ internal pull-down resistor. This pin can

also be used together with the specific fault pin (SF) to indicate which input is under fault. For more

details, see Section 9.4.3.

Logic control input address 2 (A2). The pin has a 4-MΩ internal pull-down resistor. This pin can

also be used together with the specific fault pin (SF) to indicate which input is under fault. For more

details, see Section 9.4.3.

I/O

Drain pin. Can be an input or output. The drain pin is not overvoltage protected and shall remain

within the recommended operating range.

Active high logic enable (EN) pin. The pin has a 4-MΩ internal pull-down resistor. The device is

disabled and all switches become high impedance when the pin is low. When the pin is high, the Ax

logic inputs determine individual switch states. For more details, see Section 9.4.3.

General fault flag. This pin is an open drain output and is asserted low when overvoltage condition is

detected on any of the source (Sx) input pins. Connect this pin to an external supply (1.8 V to 5.5 V)

through a 1-kΩ pull-up resistor.

GND

Ground (0 V) reference.

I/O

Overvoltage protected source pin 1. Can be an input or output.

I/O

Overvoltage protected source pin 2. Can be an input or output.

I/O

Overvoltage protected source pin 3. Can be an input or output.

I/O

Overvoltage protected source pin 4. Can be an input or output.

I/O

Overvoltage protected source pin 5. Can be an input or output.

I/O

Overvoltage protected source pin 6. Can be an input or output.

I/O

Overvoltage protected source pin 7. Can be an input or output.

I/O

Overvoltage protected source pin 8. Can be an input or output.

Specific fault flag. Table 9-1 shows how this pin is an open drain output and is asserted low when

overvoltage condition is detected on a specific pin, depending on the state of A0, A1, and A2.

Connect this pin to an external supply (1.8 V to 5.5 V) through a 1-kΩ pull-up resistor.

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TMUX7348F, TMUX7349F

SCDS400A – MARCH 2022 – REVISED NOVEMBER 2022

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