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Device Schematic

App Note [1] Biasing - As shown in the bonding diagram, this device is operated with a single drain and gate

voltage and it also includes a separate gain control voltage. Maximum gain bias is nominally Vd=8.5V, Vg1=0.0V,

Vg2=1.0V, and Id=120mA. Gain can be adjusted by changing Vg1. It is recommended to use active biasing to keep the

currents constant as the RF power and temperature vary; this gives the most reproducible results. Depending on the

supply voltage available and the power dissipation constraints, the bias circuit may be a single transistor or a low power

operational amplifier, with a low value resistor in series with the drain supply used to sense the current. The gate of the

pHEMT is controlled to maintain correct drain current and thus drain voltage. The typical gate voltage needed to do this

is 0.0V. Typically the gate is protected with Silicon diodes to limit the applied voltage. Also, make sure to sequence the

applied voltage to ensure negative gate bias is available before applying the positive drain supply.

App Note [2] Bias Arrangement - Each DC pad (Vd and Vg1,2) need to have DC bypass capacitance (~100-200 pF) as

close to the device as possible. Additional DC bypass capacitance (~0.01 uF) is also recommended.

Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099

Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com

Characteristic Data and Specifications are subject to change without notice.

©2005 Mimix Broadband, Inc.

Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept

their obligation to be compliant with U.S. Export Laws.

0.05-50.0 GHz GaAs MMIC

Distributed Amplifier

D1002

MTTF Table (TBD)

Backplate

Temperature

55 deg Celsius

75 deg Celsius

95 deg Celsius

Channel

Temperature

deg Celsius

deg Celsius

deg Celsius

FITs

E+

E+

E+

MTTF Hours

E+

E+

E+

Rth

C/W

C/W

C/W

Bias Conditions: Vd=8.5V, Id=120 mA

These numbers were calculated based on accelerated life test information and thermal model analysis received from the fabricating foundry.

August 2005 - Rev 04-Aug-05