AP3981C

Document number: DS41619 Rev. 2 - 2

11 of 16

www.diodes.com

June 2019

© Diodes Incorporated

AP3981C

Operation Description (continued)

4.

Multiple Segment Peak Current

In the original PFM PSR system, the switching frequency decreases with the decreasing output current, which will encounter audible noise issue

when switching frequency decreases below 20kHz.

In order to avoid audible noise issue and a big drop in efficiency at light load, the AP3981C uses a 3-segment primary peak current control

method at CV mode, the current sense threshold voltage is piecewise defined. As shown in Figure 3, the low threshold VCS_L is set under 2% CC

load, the high threshold VCS_H is set above 40% CC load. Within the range from 2% to 40%, the threshold VCS_M increases basing on the load

condition, the VCS_M is carefully calculated inside the AP3981C to make the system operate at a reasonable switching frequency which rises

above 20kHz at a varying slope.

VcsH

VcsL

AM

FM

FM

65kHz

26kHz

IO/IO_MAX

100%

40%

2%

Figure 3. Segment Peak Current and Operating Frequency at CV Mode

5.

Sample Time

As shown in Equation 5 and Figure 2, the detected auxiliary voltage reflects the output voltage. To be compatible with different system designs

and avoid the turn-off ringing voltage influence on CV sampling, the tSAMPLE is designed to be proportional of tONS. On the other hand, to alleviate

the Vd effect on the accuracy of VOUT, the sample ratio of tSAMPLE to tONS varies according to load condition. The tSAMPLE is usually 50% of tONS

for the below 2% CC load conditions and 80% of tONS for the above 40% CC load conditions, within the range from 2% to 40% loading, the sample

ratio rises linearly from 50% to 80%.

6.

Capacitive Load Start-Up Capability

In order to achieve fast start-up for capacitive load startup applications, the AP3981C induces a two level CC point design during start up time.

The output voltage rises after power on, when the detected output voltage is lower than SUVP point, the tONS/tSW is set to be 0.75, which means

output constant current is 1.5 times of normal output constant current. When the output voltage rises above SUVP point, the tONS/tSW is switched

to the normal value of 0.5.

7.

Leading Edge Blanking

When the power switch is turned on, a turn-on spike voltage will occur on the VCS sense resistance. To avoid false-termination of the switching

pulse, a fixed 470ns leading-edge blanking time is built in. During this blanking period, the current sense comparator is disabled and the primary

MOSFET cannot be turned off.

8.

Valley Turn-On

When the off time (tOFF) is shorter than tVAL-ON, the AP3981C power system can work with valley turn-on. It can reduce the switching-on power

losses and achieve high overall efficiency. At the same time, because of valley turn-on the switching frequency has the random jitter feature,

which will be of benefit to conductive EMI performance. The valley turn-on can also reduce the power switch turn-on spike current and then

achieve the better radiative EMI performance.