FXPS7115D4 datasheet(37/75 Pages) NXP

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NXP Semiconductors

FXPS7115D4

Digital absolute pressure sensor, 40 kPa to 115 kPa

The procedure for writing to the user OTP array UF0 and UF1 regions is listed below:

1. Read the appropriate CRC_UFx register and confirm the LOCK_Uxx bit is not set.

2. Write the desired values to the user array registers for only the region to be written

using the procedures in Section 7.7.6 "UF_REGION_W, UF_REGION_R - UF region

selection registers (address 14h, 15h)" .

The user must take care to ensure that the proper data is written to each region. If

a register write is executed to a new region, the base address changes to the new

region. The previous data written to the register block remains in the shared registers

and is written to OTP if the Write OTP sequence is completed.

3. Execute a write to the WRITE_OTP_EN register with the appropriate bits set for the

desired region to program.

Once the WRITE_OTP_EN register write is completed, a CRC is calculated for the

data to be written to the region, the register values are written to OTP and the region

is locked from future writes. The UOTP_WR_INIT bit remains set.

4. Delay 10 ms to allow the device to complete the writes to OTP.

5. Verify that the OTP write has successfully completed by reading back all of the OTP

registers using register read commands as defined in Section 7.7.6 "UF_REGION_W,

UF_REGION_R - UF region selection registers (address 14h, 15h)".

6. Repeat steps 1 through 4 for all regions to be programmed.

The procedure for writing to the user OTP array UF2 region is listed below:

1. Read the CRC_UF2 register and confirm the LOCK_UF2 bit is not set.

2. Write the desired values to the user array registers.

3. Execute a write to the WRITE_OTP_EN register with region 2 selected and the

EX_COMMTYPE and EX_PADDR bits set as shown in Table 50.

Once the WRITE_OTP_EN register write is completed, a CRC is calculated for the

data to be written to the region, the register values are written to OTP and the region

is locked from future writes. The UOTP_WR_INIT bit remains set.

4. Delay 10 ms to allow the device to complete the writes to OTP.

5. Verify that the OTP write successfully completed by reading back all of the OTP

registers using register read commands.

7.7.6 UF_REGION_W, UF_REGION_R - UF region selection registers (address

14h, 15h)

The UF region load register is a user read/write register that contains the control bits for

the UF0 and UF1 regions to be accessed. This register is included in the user read/write

array error detection. The UF region active register is a read-only register that contains

the status bits for the UF0 and UF1 regions to be accessed. This register is included in

the user read/write array error detection.

The UF_REGION_W register is readable and writable in SPI mode or I2C mode. The

UF_REGION_R register is readable in SPI mode or I2C mode.

Bit

Symbol

REGION_LOAD[3:0]

Factory default

Access

R/W

Table 51. UF_REGION_W - UF region selection register (address 14h) bit allocation

FXPS7115D4

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Product data sheet

Rev. 6 — 6 June 2022

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