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LC64B Datasheet(PDF) 39 Page - Lattice Semiconductor

Part # LC64B
Description  IC SWITCH DIGITAL 208FBGA
PDF  75 Pages
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Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

LC64B Datasheet(HTML) 39 Page - Lattice Semiconductor

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Lattice Semiconductor
ispGDX2 Family Data Sheet
36
ispGDX2V/B/C, ispGDX2EV/EB/EC Timing Adjusters
Parameter
Description
-3
-32
-35
-5
Units
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Optional Adders
tINDIO
Input Delay
—
1.50
—
1.50
—
1.50
—
2.50
ns
tPLL_SEC_DELAY
Secondary PLL Output
Delay
—
1.30
—
1.30
—
1.30
—
1.30
ns
tIOO Output Adjusters
Slow Slew
Using Slow Slew (LVTTL and
LVCMOS Outputs Only)
—
0.90
—
0.90
—
0.90
—
0.90
ns
LVTTL_out
Using 3.3V TTL Drive
—
1.20
—
1.20
—
1.20
—
1.20
ns
LVCMOS_18_4mA_out
Using 1.8V CMOS Standard,
4mA Drive
—
0.30
—
0.30
—
0.30
—
0.30
ns
LVCMOS_18_5.33mA_out
Using 1.8V CMOS Standard,
5.33mA Drive
—
0.30
—
0.30
—
0.30
—
0.30
ns
LVCMOS_18_8mA_out
Using 1.8V CMOS Standard,
8mA Drive
—
0.00
—
0.00
—
0.00
—
0.00
ns
LVCMOS_18_12mA_out
Using 1.8V CMOS Standard,
12mA Drive
—
0.00
—
0.00
—
0.00
—
0.00
ns
LVCMOS_25_4mA_out
Using 2.5V CMOS Standard,
4mA Drive
—
1.20
—
1.20
—
1.20
—
1.20
ns
LVCMOS_25_5.33mA_out
Using 2.5V CMOS Standard,
5.33mA Drive
—
1.00
—
1.00
—
1.00
—
1.00
ns
LVCMOS_25_8mA_out
Using 2.5V CMOS Standard,
8mA Drive
—
0.40
—
0.40
—
0.40
—
0.40
ns
LVCMOS_25_12mA_out
Using 2.5V CMOS Standard,
12mA Drive
—
0.40
—
0.40
—
0.40
—
0.40
ns
LVCMOS_25_16mA_out
Using 2.5V CMOS Standard,
16mA Drive
—
0.40
—
0.40
—
0.40
—
0.40
ns
LVCMOS_33_4mA_out
Using 3.3V CMOS Standard,
4mA Drive
—
1.20
—
1.20
—
1.20
—
1.20
ns
LVCMOS_33_5.33mA_out
Using 3.3V CMOS Standard,
5.33mA Drive
—
1.20
—
1.20
—
1.20
—
1.20
ns
LVCMOS_33_8mA_out
Using 3.3V CMOS Standard,
8mA Drive
—
0.80
—
0.80
—
0.80
—
0.80
ns
LVCMOS_33_12mA_out
Using 3.3V CMOS Standard,
12mA Drive
—
0.60
—
0.60
—
0.60
—
0.60
ns
LVCMOS_33_16mA_out
Using 3.3V CMOS Standard,
16mA Drive
—
0.60
—
0.60
—
0.60
—
0.60
ns
LVCMOS_33_20mA_out
Using 3.3V CMOS Standard,
20mA Drive
—
0.30
—
0.30
—
0.30
—
0.30
ns
AGP_1X_out
Using AGP 1x Standard
—
0.60
—
0.60
—
0.60
—
0.60
ns
BLVDS_out
Using Bus Low Voltage Dif-
ferential Signaling (BLVDS)
—
1.00
—
1.00
—
1.00
—
1.00
ns
CTT25_out
Using CTT 2.5v
—
0.30
—
0.30
—
0.30
—
0.30
ns
CTT33_out
Using CTT 3.3v
—
0.20
—
0.20
—
0.20
—
0.20
ns
GTL+_out
Using GTL+
—
0.50
—
0.50
—
0.50
—
0.50
ns
HSTL_I_out
Using HSTL 2.5V, Class I
—
0.50
—
0.50
—
0.50
—
0.50
ns
HSTL_III_out
Using HSTL 2.5V, Class III
—
0.60
—
0.60
—
0.60
—
0.60
ns
HSTL_IV_out
Using HSTL 2.5V, Class IV
—
0.60
—
0.60
—
0.60
—
0.60
ns



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