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LC64B Datasheet(PDF) 21 Page - Lattice Semiconductor |
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LC64B Datasheet(HTML) 21 Page - Lattice Semiconductor |
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21 / 75 page  Lattice Semiconductor ispGDX2 Family Data Sheet 18 Figure 14. sysHSI Block with SERDES and FIFO sysHSI Block Core Logic CSPLL SS_CLKOUT SS_CLKIN CAL Shared Source Synchronous pins drive multiple sysHSI blocks CSLOCK CSLOCK TXD RXD RECCLK Serializer SERDES SOUT SIN FIFO De-serializer including CDR 10 10 10 10 FIFO REFCLK (0:3) Reference clocks from CLK (0:3) Note: Some pins are shared. See Logic Signal Connections table for details GDX Block GDX Block GRP Serializer De-serializer including CDR TXD RXD RECCLK SOUT SIN SERDES |
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