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DS2705UT Datasheet(PDF) 11 Page - Maxim Integrated Products

Part # DS2705UT
Description  SHA-1 Authentication Master
PDF  18 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS2705UT Datasheet(HTML) 11 Page - Maxim Integrated Products

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DS2705: SHA-1 Authentication Master
11 of 18
MAC Comparison
After the SHA-1 computation is completed by the remote token, the DS2705 and remote SHA-1 token both contain
a MAC result based on the secret key. The results are compared by the DS2705 on a bit by bit basis as the MAC
data is read in from the remote token. Note that the secret is never transmitted on the bus and thus cannot be
captured by observing bus traffic.
Multiple Authentication Attempts
The DS2705 is configurable for multiple authentication attempts or re-tries to avoid reporting authentication failure
in the event of contact bounce or a noisy communication channel. When configured for more than one retry, the
status outputs are kept at the previous state until one attempt succeeds or all attempts fail. It is always
recommended to configure the DS2705 for at least one retry.
Signaling Authentication Results
Authentication results are signaled on the open drain
PASS and FAIL output pins. During an authentication attempt,
both outputs remain at their previous state. After authentication is complete, the pass or fail status is reported until
the display is cleared by one of the following conditions:
§
CHAL pin returning to inactive logic level.
§
Battery token removal detected when no 1-Wire Presence Pulse is returned in response to a 1-Wire
Reset.
Table 4. PASS/FAIL Outputs
CONDITION
FOM BIT
PASS OUTPUT
FAIL OUTPUT
Token Not Present
x
Hi-Z
Hi-Z
Authentication in
Progress
x
No Change
No Change
Complete: Pass
x
LOW
Hi-Z
0
Hi-Z
LOW
Complete: Fail
1
Hi-Z
Pulse
PROGRAMMING AND CONFIGURING
The DS2705 requires a configuration step prior to deployment to program the 64-bit challenge, 160-bit response
and to set up desired configuration options. Configuration is performed in slave mode using the SDQ and VPP
pins. The Challenge-and-Response pair, and option data are programmed in on-chip EEPROM that requires an
externally supplied programming voltage. After programming and verifying the EEPROM data, setting of the Lock
bits is recommended to prevent future modification. SDQ and VPP have internal pull downs which prevent the pins
from floating during normal operation.



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