AS8500 - Preliminary Data Sheet

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Revision 1.1, 04-April-06

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7.4

Modes of operation

The AS8500 can run in different operation modes, which are selected and activated via the serial interface.

Detailed description:

Mode 0: MZL

In power-on reset sequence, which is initiated by the on-chip power-on reset circuit whenever the power is connected , the registers are loaded from the

Zener-Zap memory.

Mode 1: MMS

Measurement mode where the definition is taken from the registers CRA and CRG defined later on. The measurements are continuous and measured

results are available after the ready flag (INTN pin) is set to LO. The result can be read by the µC any time after this bit is set to LO. However, to obtain

the best noise performances the result should be read when INTN pin is at LO state. All modules are in power-up.

Mode 2: MMD

Dual channel measurement mode. Two consecutive different measurements are performed according to the settings in the configuration registers CRA,

CRB and CRG defined later (usually CRA defining current measurements and CRB voltage measurement). One complete measurement is performed

with each setting. CRG register holds common settings.

definition LO=A, HI=B.

The number of consecutive measurements with equal configuration is defined in register CRG (bits s3,s2,s1,s0). All modules are in power-up.

Mode 3: MWU

In this wake-up mode the internal clock finclk=256kHz is running and one complete measurement is performed in the period from 1 to 1.5 s with the

parameter settings of the CRA register. Before the actual measurement is performed the logic powers up all internal circuits especially the AGND and

the Vref. If the external load is higher than 70 kOhms both signals can be used for external triggering or even as interrupt for the µC.

If the external clock is not running, this input should be high impedance. To achieve a stable low idle current the oversampling ratio should be set to

R1=128 and the CFG register must be programmed to x00003, see also 7.4 ‘Register description’. It is assumed that the threshold level in the THR

register is defined within the 16 bit range, if not the default value is 210

After one measurement is finished all modules except the on- board oscillator and divider are switched into power down condition to save power. The

MSR register is updated with the last measurement result. Whenever this value exceeds the digital threshold the (wake-up) INTN pin goes LO for one

clock cycle to trigger the wake-up event in the external µC.

After that the circuit returns in power-down for approximately 1s. During this time the last measurement (MSR register) is available on the SDI interface.

In this intermediate sleep-mode all modules except internal oscillator and divider are in power-down mode. The SDI interface works independent which

means that the measurement result is available by reading the MSR register. At any time the microprocessor can start any other mode via SDI. In such

a case the external clock must be switched on first.

The chip goes in MWU mode (mode 3) after it received the command for that. After that command 6 or more additional CLK pulses are needed before

external clock may go to power down mode (no CLK pulses, high level because of internal pull-up resistors). This 6 CLK pulses are needed for

synchronisation. On the way back to normal mode this restriction is not needed.

Mode 4: MAM

In this alarm mode the measurement defined in CRA is going on. The channel bit in the THR register must be cleared (channel A). The threshold value

may be positive or negative. Whenever the measured value exceeds the digital threshold value in the THR register the pin INTN (in this mode its

function is to signal alarm-condition) goes LO for one clock cycle. For negative threshold value the signed measurement result must be more negative

than the THR value to activate the alarm. During measurements the signal INTN is high. All modules are in power-up, measurements are continuously

going on.

Mode 5: MZP

Zener-Zap programming/reading. This mode for factory programming only and should not be used by the customer.

Mode 6: MPD

Power down mode. Individual analog blocks can be disabled/enabled. The data acquisition system is not running during this mode is activated.

Mode 7: MSI

The operation in this mode is exactly the same as in MMS mode except that the internal clock is used.

The SDI interface signals can become active whenever appropriate. This mode can be used if no external clock CLK is available. The measuring speed

is reduced by a factor of 16.

Modes 8-15: These modes are reserved for testing purposes and should not be used by the customer. Reading and writing of some registers is only

possible in these higher modes. Write to registers CAR (calibration register) and TRR (trimming register) is allowed only in test modes.