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XRT75L02 Datasheet(PDF) 13 Page - Exar Corporation |
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XRT75L02 Datasheet(HTML) 13 Page - Exar Corporation |
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13 / 50 page ![]() XRT75L02 xr xr xr xr TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER REV. 1.0.3 11 MODE SELECT PIN # SIGNAL NAME TYPE DESCRIPTION 2 24 E3_0 E3_1 I E3 Mode Select Input A "High" on this pin configures in E3 mode. A "Low" on this pin configures in either STS-1 or DS3 mode depending on the settings on pins 3 and 23.. NOTES: 1. This pin is internally pulled down 2. This pin is ignored if configured to operate in HOST mode. 3 23 STS1/DS3 _0 STS1/DS3 _1 I STS-1/DS3 Select Input A “High” on these pins configures in STS-1 mode. A “Low” on these pins configures in DS3 mode. These pins are ignored if the E3_n pins are set to “High”. NOTES: 1. This pin is internally pulled down 2. This pin is ignored if configured to operate in HOST mode. 26 HOST/HW I Host/Hardware Mode: Tie this pin “High” to configure in Host mode and “Low” for Hardware mode. 100 SR/DR I Single-Rail/Dual-Rail Select: Setting this “High” configures both the Transmitter and Receiver to operate in Single-rail mode and also enables the B3ZS/HDB3 Encoder and Decoder. In Single-rail mode, TNEG_n pin should be grounded. Setting this “Low” configures both the Transmitter and Receiver to operate in Dual-rail mode and disables the B3ZS/HDB3 Encoder and Decoder. NOTE: This pin is internally pulled down. MICROPROCESSOR SERIAL INTERFACE - (HOST MODE) PIN # SIGNAL NAME TYPE DESCRIPTION 29 CS RxCLKINV I Microprocessor Serial Interface - Chip Select Tie this “Low” to enable the communication with the Microprocessor Serial Inter- face. NOTE: If configured in Hardware Mode, this pin functions as RxClkINV. 30 SCLK TxCLKINV I Serial Interface Clock Input The data on the SDI pin is sampled on the rising edge of this signal. Addition- ally, during Read operations the Microprocessor Serial Interface updates the SDO output on the falling edge of this signal. NOTE: If configured in Hardware Mode, this pin functions as TxClkINV. 31 SDI RxON I Serial Data Input: Data is serially input through this pin. The input data is sampled on the rising edge of the SClk. . NOTES: 1. This pin is internally pulled down 2. If configured in Hardware Mode, this pin functions as RxON. |
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