CS5828
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PIN DESCRIPTION
Name
I/O
Description
D0,D1,D2,D3,D4,
D6,D7
I
Parallel data input for Y0 LVDS channel. D[0] is LSB and D[7] is MSB. MSB is shifted out
first.
D8,D9,D12,D13,
D14,D15,D18
I
Parallel data input for Y1 LVDS channel. D[8] is LSB and D[18] is MSB.
D19,D20,D21,D22
,D24,D25,D26
I
Parallel data input for Y2 LVDS channel. D[19] is LSB and D[26] is MSB.
D27,D5,D10,D11,
D16,D17,D23
I
Parallel data input for Y3 LVDS channel. D[27] is LSB and D[23] is MSB.
CKIN
I
Parallel input clock.This clock signal is used for parallel data reference. It is also used by
the on-chip PLL to generate the 7X shift clock for parallel to serial conversion.
RF
I
Rise/fall select. This pin selects the polarity of the CKIN edge for data input. RF = 1
selects CKIN rise edge, and RF = 0 selects CKIN fall edge.
SHTDN
I
Shutdown control (low active). When SHTDN is low, the internal PLL is put into inhibit
mode and all LVDS output channels are shut off. This also resets all internal registers.
For normal operation, SHTDN should be set to high.
Y0P, Y0N
O
Y0 LVDS channel output. These are differential LVDS outputs for Y0 channel
corresponds to D0, D1, D2, D3, D4, D6, D7.
Y1P, Y1N
O
Y1 LVDS channel output. These are differential LVDS outputs for Y1 channel
corresponds to D8, D9, D12, D13, D14, D15, D18.
Y2P, Y2N
O
Y2 LVDS channel output. These are differential LVDS outputs for Y2 channel
corresponds to D19, D20, D21,D22, D24, D25, D26.
Y3P, Y3N
O
Y3 LVDS channel output. These are differential LVDS outputs for Y3 channel
corresponds to D27, D5, D10, D11, D16, D17, D23.
CKOP, CKON
O
Clock LVDS channel output. These are differential LVDS output for the replica of CKIN
signal. CKOP and CKON are derived from the internal phase lock loop and phase
aligned with the serial data output and can be used by the LVDS receiver for reference
edge.
PLL_VDD
P
Power supply for PLL circuit.
PLL_VSS
P
Power ground for PLL circuit.
LVDS_VDD
P
Power supply for output buffer circuits.
LVDS_VSS
P
Power ground for output buffer circuits.
VDD
P
Power supply for internal circuits.
VSS
P
Power ground for internal circuits.
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