N74F173N datasheet(7/10 Pages) PHILIPS

7 / 10 page

Philips Semiconductors

Product specification

74F173

Quad D-type flip–flop (3-State)

August 31, 1990

tw(H)

trec

tPHL

SF00295

Waveform 2. Master reset pulse width, master reset to output

delay and master reset to clock recovery time

tsu(L)

th(L)

tsu(H)

th(H)

En, Dn

SF00296

Waveform 3. Data and enable setup time and hold times

tPHZ

tPZH

VOH -0.3V

10%

90%

SF00297

Waveform 4. 3-state output enable time to high level, output

disable time from high level and transition time to high level

tPLZ

tPZL

VOL +0.3V

3.5V

10%

90%

SF00298

Waveform 5. 3-state output enable time to low level, output

disable time from low level and transition time to low level

Notes to AC waveforms

1. For all waveforms, VM = 1.5V.

2. The shaded areas indicate when the input is permitted to change for predictable output performance.

TEST CIRCUIT AND WAVEFORMS

90%

10%

90%

10%

90%

10%

90%

10%

NEGATIVE

PULSE

POSITIVE

PULSE

AMP (V)

tTHL (tf )

INPUT PULSE REQUIREMENTS

rep. rate

tTLH

tTHL

1MHz

500ns

2.5ns

Input Pulse Definition

VCC

family

74F

D.U.T.

PULSE

GENERATOR

VIN

VOUT

Test Circuit for Open Collector Outputs

DEFINITIONS:

RL = Load resistor;

see AC electrical characteristics for value.

CL = Load capacitance includes jig and probe capacitance;

see AC electrical characteristics for value.

RT = Termination resistance should be equal to ZOUT of

pulse generators.

tTHL (tf )

tTLH (tr )

AMP (V)

amplitude

3.0V

1.5V

7.0V

SF00128

TEST

SWITCH

tPLZ

closed

tPZL

closed

All other

open

SWITCH POSITION

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