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74F595 Datasheet(PDF) 9 Page - NXP Semiconductors |
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74F595 Datasheet(HTML) 9 Page - NXP Semiconductors |
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9 / 13 page ![]() Philips Semiconductors Product specification 74F595 8-bit shift register with output latches (3-State) 1990 Apr 18 9 AC WAVEFORMS (Continued) For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance. VM VM VM tPHZ tPZH VOH -0.3V 0V OE Q0–Q7 SF01104 Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level VM VM VM tPLZ tPZL VOL +0.3V Q0–Q7 OE SF01105 Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level TEST CIRCUIT AND WAVEFORMS tw 90% VM 10% 90% VM 10% 90% VM 10% 90% VM 10% NEGATIVE PULSE POSITIVE PULSE tw AMP (V) 0V 0V tTHL (tf ) INPUT PULSE REQUIREMENTS rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns Input Pulse Definition VCC family 74F D.U.T. PULSE GENERATOR RL CL RT VIN VOUT Test Circuit for 3-State Outputs DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. tTHL (tf ) tTLH (tr ) tTLH (tr ) AMP (V) amplitude 3.0V 1.5V VM RL 7.0V SF00777 TEST SWITCH tPLZ closed tPZL closed All other open SWITCH POSITION |
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