Philips Semiconductors

Product specification

74F597

8-bit shift register with input storage registers

1991 Sep 13

3

LOGIC SYMBOL

11

10

SHRST

SHCP

15

1

2

3

D0

D1

D2

D3

13

12

STCP

SHLD

SF01107

VCC = Pin 16

GND = Pin 8

14

Qs

45

6

D4

D5

D6

7

D7

14

Ds

IEC/IEEE SYMBOL (IEEE/IEC)

SF01108

15

1D

R

C3/

!

10

11

13

12

2

3

4

C1

1

SRG8

6

7

5

3D

2D

14

C2

9

FUNCTION TABLE

INPUTS

OPERATING MODES

STCP

SHCP

SHLD

SHRST

OPERATING MODES

↑

X

X

X

Data loaded to storage registers

↑

L

L

H

Data loaded from inputs to shift register

↑

L

L

H

Data transferred from storage registers to shift registers

X

L

L

L

Invalid logic, state of shift register indeterminate when signals removed

X

X

H

L

Shift register cleared

X

↑

H

H

Shift register clocked, Qn=Qn–1, Q0=Ds

↑

H

X

H

Hold

H = High voltage level

L

= Low voltage level

X = Don’t care

↑ = Low-to-High clock transition

↑ = Not a Low-to-High clock transition