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PIC16F15213 Datasheet(PDF) 164 Page - Microchip Technology |
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PIC16F15213 Datasheet(HTML) 164 Page - Microchip Technology |
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164 / 439 page ![]() Figure 20-1. Timer1 Block Diagram TxGPPS TxGATE GPOL 0 1 Single Pulse Acq. Control 1 0 GSPM ON GTM GE ON D Q EN TMRxL TMRxH Tx_overflow set flag bit TMRxIF TMRx (2) 1 0 TxCLK Prescaler 1,2,4,8 SYNC Sleep Input Fosc/2 Internal Clock CKPS Synchronized Clock Input 2 det Synchronize (3) (1) D Q CK R Q GGO/DONE TxCLK D Q set bit TMRxGIF GVAL Q1 det Interrupt NOTE (5) Note (4) To Comparators (6) 00 00 0000 4 4 111 1 11 11 PPS TxCKIPPS PPS Notes: 1. This signal comes from the pin selected by Timer1 PPS register. 2. TMRx register increments on rising edge. 3. Synchronize does not operate while in Sleep. 4. See TxCLK for clock source selections. 5. See TxGATE for gate source selections. 6. Synchronized comparator output must not be used in conjunction with synchronized input clock. 20.1 Timer1 Operation The Timer1 module is a 16-bit incrementing counter accessed through the TMRx register. Writes to TMRx directly update the counter. When used with an internal clock source, the module is a timer that increments on every instruction cycle. When used with an external clock source, the module can be used as either a timer or counter and increments on every selected edge of the external source. Timer1 is enabled by configuring the ON and GE bits. Table 20-1 shows the possible Timer1 enable selections. PIC16F15213/14/23/24/43/44 TMR1 - Timer1 Module with Gate Control © 2020-2022 Microchip Technology Inc. and its subsidiaries Data Sheet DS40002195E-page 164 |
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