PIC16F15213 datasheet(166/439 Pages) MICROCHIP

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20.3

Timer1 Prescaler

Timer1 has four prescaler options allowing 1, 2, 4 or 8 divisions of the clock input. The CKPS bits control the prescale

counter. The prescale counter is not directly readable or writable; however, the prescaler counter is cleared upon a

write to TMRx.

20.4

Timer1 Operation in Asynchronous Counter Mode

When the SYNC Control bit is set, the external clock input is not synchronized. The timer increments asynchronously

to the internal phase clocks. If the external clock source is selected, then the timer will continue to run during

Sleep and can generate an interrupt on overflow, which will wake up the processor. However, special precautions in

software are needed to read/write the timer.

Important: When switching from synchronous to asynchronous operation, it is possible to skip an

increment. When switching from asynchronous to synchronous operation, it is possible to produce an

additional increment.

20.4.1

Reading and Writing TMRx in Asynchronous Counter Mode

Reading TMRxH or TMRxL while the timer is running from an external asynchronous clock will ensure a valid read

(taken care of in hardware). However, the user must keep in mind that reading the 16-bit timer in two 8-bit values

itself poses certain problems, since there may be a carry-out of TMRxL to TMRxH between the reads.

For writes, it is recommended that the user simply stop the timer and write the desired values. A write contention may

occur by writing to the timer registers, while the register is incrementing. This may produce an unpredictable value in

the TMRxH:TMRxL register pair.

20.5

Timer1 16-Bit Read/Write Mode

Timer1 can be configured to read and write all 16 bits of data to and from the 8-bit TMRxL and TMRxH registers,

simultaneously. The 16-bit read and write operations are enabled by setting the RD16 bit. To accomplish this function,

the TMRxH register value is mapped to a buffer register called the TMRxH buffer register. While in 16-bit mode, the

TMRxH register is not directly readable or writable and all read and write operations take place through the use of

this TMRxH buffer register.

When a read from the TMRxL register is requested, the value of the TMRxH register is simultaneously loaded into the

TMRxH buffer register. When a read from the TMRxH register is requested, the value is provided from the TMRxH

buffer register instead. This provides the user with the ability to accurately read all 16 bits of the Timer1 value from a

single instance in time (refer to Figure 20-3 for more details). In contrast, when not in 16-bit mode, the user must read

each register separately and determine if the values have become invalid due to a rollover that may have occurred

between the read operations.

When a write request of the TMRxL register is requested, the TMRxH buffer register is simultaneously updated with

the contents of the TMRxH register. The value of TMRxH must be preloaded into the TMRxH buffer register prior to

the write request for the TMRxL register. This provides the user with the ability to write all 16 bits to the TMRx register

at the same time. Any requests to write to TMRxH directly does not clear the Timer1 prescaler value. The prescaler

value is only cleared through write requests to the TMRxL register.

PIC16F15213/14/23/24/43/44

TMR1 - Timer1 Module with Gate Control

and its subsidiaries

Data Sheet

DS40002195E-page 166

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