PIC16F15213 datasheet(167/439 Pages) MICROCHIP

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Figure 20-3. Timer1 16-Bit Read/Write Mode Block Diagram

TMRx

High Byte

TMRxL

TMRxH

From

TMRx

Circuitr y

Set TMRxIF

on Overflow

Read TMRxL

Write TMRxL

Inte rnal Da ta Bus

20.6

Timer1 Gate

Timer1 can be configured to count freely or the count can be enabled and disabled using Timer1 gate circuitry. This is

also referred to as Timer1 gate enable. Timer1 gate can also be driven by multiple selectable sources.

20.6.1

Timer1 Gate Enable

The Timer1 Gate Enable mode is enabled by setting the GE bit. The polarity of the Timer1 Gate Enable mode is

configured using the GPOL bit.

When Timer1 Gate Enable mode is enabled, Timer1 will increment on the rising edge of the Timer1 clock source.

When Timer1 Gate signal is inactive, the timer will not increment and hold the current count. Enable mode is

disabled, no incrementing will occur and Timer1 will hold the current count. See Figure 20-4 for timing details.

Table 20-2. Timer1 Gate Enable Selections

TMRxCLK

GPOL

TxG

Timer1 Operation

↑

Counts

↑

Holds Count

↑

Holds Count

↑

Counts

PIC16F15213/14/23/24/43/44

TMR1 - Timer1 Module with Gate Control

and its subsidiaries

Data Sheet

DS40002195E-page 167

PIC16F15213 Datasheet(PDF) 167 Page - Microchip Technology

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