PIC16F15213 datasheet(171/439 Pages) MICROCHIP

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Important: The TMRx register and the TMRxIF bit need to be cleared before enabling interrupts.

20.8

Timer1 Operation During Sleep

Timer1 can only operate during Sleep when configured as an asynchronous counter. In this mode, many clock

sources can be used to increment the counter. To set up the timer to wake the device:

• The ON bit must be set

• The TMRxIE bit of the PIEx register must be set

• Global interrupts must be enabled

• The SYNC bit must be set

• Configure the TxCLK register for using any clock source other than FOSC and FOSC/4

The device will wake up on an overflow and execute the next instruction. If global interrupts are enabled, the device

will call the IRS. The secondary oscillator will continue to operate in Sleep regardless of the SYNC bit setting.

20.9

CCP Capture/Compare Time Base

The CCP modules use TMRx as the time base when operating in Capture or Compare mode. In Capture mode, the

value in TMRx is copied into the CCPRx register on a capture event. In Compare mode, an event is triggered when

the value in the CCPRx register matches the value in TMRx. This event can be a Special Event Trigger.

20.10 CCP Special Event Trigger

When any of the CCPs are configured to trigger a special event, the trigger will clear the TMRx register. This special

event does not cause a Timer1 interrupt. The CCP module may still be configured to generate a CCP interrupt. In this

mode of operation, the CCPRx register becomes the period register for Timer1. Timer1 must be synchronized and

FOSC/4 must be selected as the clock source to utilize the Special Event Trigger. Asynchronous operation of Timer1

can cause a Special Event Trigger to be missed. In the event that a write to TMRxH or TMRxL coincides with a

Special Event Trigger from the CCP, the write will take precedence.

20.11 Register Definitions: Timer1 Control

Long bit name prefixes for the Timer registers are shown in the table below, where ‘x’ refers to the Timer instance

number. Refer to the “Long Bit Names” section in the “Register and Bit Naming Conventions” chapter for more

information.

Table 20-3. Timer1 Register Bit Name Prefixes

Peripheral

Bit Name Prefix

Timer1

PIC16F15213/14/23/24/43/44

TMR1 - Timer1 Module with Gate Control

and its subsidiaries

Data Sheet

DS40002195E-page 171

PIC16F15213 Datasheet(PDF) 171 Page - Microchip Technology