AND8048 datasheet(2/8 Pages) ONSEMI

2 / 8 page

AND8048/D

http://onsemi.com

MODEL EVALUATION

P–CHANNEL DEVICE (TJ = 25°C unless otherwise noted)

Characteristic

Symbol

Test Conditions

Typical

Unit

Static

Gate Threshold Voltage

VGS(th)

VDS = VGS, ID = –250 mA

0.83

On–State Drain Current (Note 1.)

ID(on)

VDS –5.0 V, VGS = 4.5 V

Drain–Source On–State Resistance (Note 1.)

rDS(on)

VGS = –4.5 V, ID = –3.0 A

VGS = –2.5 V, ID = –2.5 A

VGS = –1.8 V, ID = –1.0 A

0.080

0.110

0.142

Forward Transconductance (Note 1.)

gfs

VDS = 5.0 V, ID = 3.0 A

7.6

Diode Forward Voltage (Note 1.)

VSD

IS = –0.9 A, VGS = 0.0 V

–0.80

Dynamic (Note 2.)

Total Gate Charge

Gate–Source Charge

Qgs

VDS = –4.0 V, VGS = –4.5 V, ID = –3.0 A

0.5

Gate–Drain Charge

Qgd

1.5

Turn–On Delay Time

td(on)

Rise Time

VDD = –4.0 V, RL = 4.0 W, ID ^ –1.0 A,

Turn–Off Delay Time

td(off)

VGEN = –4.5 V, RG = 6.0 W

Fall Time

Source–Drain Reverse Recovery Time

trr

IF = –0.9 A, di/dt = 100 A/ms

1. Pulse test: pulse width

300 ms, duty cycle 2%.

2. Guaranteed by design, not subject to production testing.

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