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TSZ02201-0212ACB00200-1-2

© 2021 ROHM Co., Ltd. All rights reserved.

21.Jan.2022 Rev.001

www.rohm.com

TSZ22111

• 15 • 001

BD62012BFS

Description of Blocks

1. Commutation Logic

When the hall cycle is about 5-Hz or less (e.g. when the motor starts up), the commutation mode is 120° square wave

drive with upper and lower switching (no lead angle). The controller monitors the hall cycle, and switches to 150°

commutation drive when the hall cycle reaches or exceeds about 5 Hz over four consecutive cycles. Refer to the timing

charts in Figures 31 and 32.

2. Duty Control

The switching duty can be controlled by forcing DC voltage with value from VSPMIN to VSPMAX to the VSP pin. When the

VSP voltage is higher than VSPTST, the controller forces PC pin voltage to ground (Testing mode, maximum duty and no

lead angle). The VSP pin is pulled down internally by a 200 k

Ω resistor. Therefore, note the impedance when setting the

VSP voltage with a resistance voltage divider.

3. Carrier Frequency Setting

The carrier frequency setting can be freely adjusted by connecting an external resistor

between the RT pin and ground. The RT pin is biased to a constant voltage, which

determines the charge current to the internal capacitor. Carrier frequencies can be set

within a range from about 16 kHz to 50 kHz. Refer to the formula to the right.

4. FG Signal Output

The FG signal is output from the FG pin. Refer to the timing charts in Figures

31 and 32. The FG signal is generated from the hall signal.

It is recommended to pull up FGS pin to VREG voltage when malfunctioning

because of the noise.

5. Direction of Motor Rotation Setting

The direction of rotation may be switched by the CCW pin. When CCW pin is

“H” or open, the motor rotates at CCW direction. When the real direction is

different from the setting, the commutation mode is 120° square wave drive

(no lead angle). It is recommended to pull up CCW pin to VREG voltage

when malfunctioning because of the noise.

6. Hall Signal Comparator

The hall comparator provides voltage hysteresis to prevent noise malfunctions. The bias current to the hall elements

should be set to the input voltage amplitude from the element, at a value higher than the minimum input voltage, VHALLMIN.

We recommend connecting a ceramic capacitor with value from 100 pF to 0.01 µF, between the differential input pins of

the hall comparator. Note that the bias to hall elements must be set within the common mode input voltage range VHALLCM.

Table 1. 120° Commutation (Six-State) Truth Table (CW)

HU

HV

HW

UH

VH

WH

UL

VL

WL

H

L

H

L

PWM

L

H

PWM

--------------------

L

H

L

L

L

L

PWM

H

L

PWM

--------------------

H

H

L

L

L

PWM

L

H

PWM

--------------------

L

H

L

PWM

L

L

PWM

--------------------

H

L

L

H

H

PWM

L

L

PWM

--------------------

L

H

L

L

H

L

PWM

L

L

PWM

--------------------

H

FGS

Number of pulse

H

12

L

4

CCW

Direction

H

CCW

L

CW

]

400

]

[



=

k

R

kHz

f

T

OSC

[