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TLE6266G Datasheet(PDF) 9 Page - Infineon Technologies AG |
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TLE6266G Datasheet(HTML) 9 Page - Infineon Technologies AG |
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9 / 50 page ![]() Target Datasheet TLE 6266 Version 1.06 10 2002-11-26 Table 3 Operation mode table 1) only active when selected via SPI 2) HS1 is controlled by the SPI input bit 1(activate HS1) and also the PWM input pin27 if the SPI input bit 11 (PWM enable) is set. In case both controls are active, the HS1 switch is masked by the SPI input bit 1 (see figure 12) 3) automatically disabled when a reset resp. watchdog reset occurs 4) this function makes sure that the cyclic HS OFF mode can only be entered via a correct signal at the PWM pin Feature Normal mode RxD only mode Vbat stand-by mode Cyclic Wake HS ON Cyclic Wake HS OFF LDO ON ONONON OFF/ON Reset ON ONONON ON Watchdog ON ON ON ON OFF SPI ON ONONON OFF Oscillator ON ONONON ON CAN transmit ON OFF OFF OFF OFF CAN receive ON ON OFF OFF OFF OUTHS 11) 2) 3) ON ON ON OFF OFF PWM HS12) ON ON ON OFF OFF OUTHS 21) 3) ON ON ON OFF OFF OUTHS 31) 3) ON ON ON OFF OFF OUTHS 3 cycl. HS ON1) 3) OFF OFF OFF ON OFF OUTLS 11) 3) ON ON ON OFF OFF OUTLS 21) 3) ON ON ON OFF OFF OUT HS 3 Timebase-Test ON ON ON OFF OFF Wake Pin OFF OFF OFF OFF ON Failsafe PWM 4) OFF OFF OFF ON OFF 3V Supervisor 1) ON ON ON ON ON RTL output switched to Vcc switched to Vcc switched to Vs switched to Vs switched to Vs RxD output L = bus dominant; H = bus recessive L = bus dominant; H = bus recessive active low on CAN message wake-up active low on CAN message wake-up active low on CAN message wake-up |
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