TLE6266G datasheet(21/50 Pages) INFINEON

21 / 50 page

Target Datasheet TLE 6266

Version 1.06

2002-11-26

Figure 8

Cyclic Wake with CAN Message Wake-up

7.2

Wake-Up via Wake Pin

CANL is pulled to Vs. A signal transition at the wake pin WK from LOW to HIGH (rising

edge) causes a wake up and automatic transition into the cyclic HS ON mode (see

Figure 9). HS3 is activated again and also the long open window of the watchdog

mechanism. The watchdog has to be triggered correctly from that time on. If the signal

at the PWM pin makes a HIGH to LOW transition, the device switches to HS OFF again.

This wake up via the wake pin is comming from an external circuitry (switch, etc.) and

is not flagged by the RxD.

Normal Mode

Cyclic HS ON

Cyclic HS OFF

SPI

cyclic HS

Mode State

SPI word*

CANL

PWM

HS3

Watchdog trigger bit

=SPI bit0**

SPI

normal

mode

PWM

trigger

Window watchdog***

CSN,

Normal Mode

closed

window

open

window

open

window

closed

window

long open window

Cyclic HS ON

Bus

Wake

trigger

long open window

Cyclic HS ON

closed

window

open

window

closed

window

open

window

missing trigger =

timeout =

Watchdog Reset

long open window

Normal Mode

Vbat Stdby

CAN Bus message

PWM trigger

Input filtering time t

IFT

Watchdog reset pulse time t

WDR

** bit0 is transfered with the SPI input word

BUT

the watchdog trigger is set, after readout of

the SPI input bit = CSN LOW to HIGH

(see arrows at CSN signal)

* for the exact timing relations between CSN

and SPI-DI and -DO word please look at

datasheet fig. 11,12,13,14,15

*** for a correct watchdog triggering:

closed window must always exceed 12 cycles

open window is max. 20 cycles

long open window is max. 128 cycles

otherwise

a watchdog reset will be generated

SPI

normal

mode

SPI

cyclic HS

CANH

Vcc

TLE6266G Datasheet(PDF) 21 Page - Infineon Technologies AG

TLE6266G Datasheet(HTML) 21 Page - Infineon Technologies AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

Datasheet Download

Link URL