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6.2.41 BB_CTRL6

Offset

Bit Position

0x52

Reset

0x00

Access

Name

Table 6.41. BB_CTRL6

Bit

Name

Reset

Access

Description

BB_IPK_NOADJ

read-write

If 0, the boost mode peak current in EM0 is increased as

the battery voltage drops to allow a near constant maxi-

mum output current to be delivered to the load.

If 1, the voltage-dependent adjustment of peak current in

EM0 is disabled.

Peak current adjustment is always disabled in EM2 re-

gardless of this setting.

SW_FAST

read-write

VOA switch driver uses high speed mode when asserted.

Recommend to set SW_FAST=0, unless the load on

VOA_SW is > 55mA during the switching process. Firm-

ware should wait until VOA_SW_STAT.VOA_SW_ISLOW

has transitioned to 0 before enabling a larger load than

55mA on VOA_SW.

5:2

BB_IRI_CON

0x00

read-write

Controls inrush current for DCDC A by forcing a minimum

time between pulse events (i.e. Tsw, the switching period).

Inrush current limiting may be needed for operation with

batteries that have a large internal impedance and/or limi-

ted output current.

If BB_IRI_CON>0, the minimum switching period (Tsw) is

determined by the following equation:

Tsw (ns) = 300ns * ( 2 * BB_IRI_CON + 1 )

If BB_IRI_CON==0, there is no bound on the switching pe-

riod.

The resulting battery current can be calculated as: (L *

Ipk^2) / (2 * (VDDB - VOA) * Tsw ). To maintain a constant

current limit over the battery voltage range, firmware

should occasionally read the battery voltage and recalcu-

late the BB_IRI_CON value.

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