EFP01 datasheet(139/158 Pages) SILABS

139 / 158 page

6.2.44 LDOC_BB_CTRL

Offset

Bit Position

0x55

Reset

0x00

Access

Name

Table 6.44. LDOC_BB_CTRL

Bit

Name

Reset

Access

Description

SEQ_BB_FIRST

read-write

For Bootstrap modes (i.e., modes where the VDDB is sup-

plied from VOA output), setting this bit delays the enabling

of the DCDC B Buck converter and/or LDO C (in stand

alone) until after VOA has reached regulation.

6:4

BB_TON_MAX

0x00

read-write

Max Ton is bounded to 70ns*(4*BB_TON_MAX+1)

No bound if BB_TON_MAX==0

Value

Mode

Description

NOLIMIT

350NS

630NS

910NS

1190NS

1470NS

1750NS

2030NS

3:0

VOC_IRI_CON

0x00

read-write

Controls inrush current for LDO C by forcing a minimum

time between pulse events (i.e. Tsw, the switching period).

Inrush current limiting may be needed for operation with

batteries that have a large internal impedance and/or limi-

ted output current.

If VOC_IRI_CON>0, the minimum switching period (Tsw)

is determined by the following equation:

Tsw (ns) = 300ns * ( 2 * VOC_IRI_CON + 1 )

If VOC_IRI_CON==0, there is no bound on the switching

period.

EFP01 Energy Friendly PMIC Family Data Sheet

silabs.com | Building a more connected world.

Rev. 1.3 | 139

EFP01 Datasheet(PDF) 139 Page - Silicon Laboratories

EFP01 Datasheet(HTML) 139 Page - Silicon Laboratories

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL