82C85

FN2976 Rev.0.00

Page 18 of 21

March 1997

FIGURE 17. SLOW TO FAST CLOCK MODE TRANSITION

NOTE: IF TSFPC is not met on one edge of PLCK. SLO/FST will be recognized on the next edge of PLCK.

Timing Waveforms (Continued)

EFI

OR

OSC

PCLK

TSFPC

(22)

(SEE NOTE)

SLO/FST

CLK

CLK50

TSFPC

(22)

(SEE NOTE)

6 EFI

PULSES