873995 datasheet(11/21 Pages) RENESAS

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REVISION A 8/25/15

873995 DATA SHEET

DIFFERENTIAL-TO-3.3V LVPECL

ZERO DELAY/MULTIPLIER/DIVIDER

FIGURE 3C. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY

3.3V LVPECL DRIVER

FIGURE 3B. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY

3.3V LVPECL DRIVER

FIGURE 3D. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY

3.3V LVDS DRIVER

3.3V

Zo = 50 Ohm

LVPECL

Zo = 50 Ohm

HiPerClockS

CLK

nCLK

3.3V

Input

Zo = 50 Ohm

Input

HiPerClockS

CLK

nCLK

3.3V

125

Zo = 50 Ohm

3.3V

125

LVPECL

3.3V

DIFFERENTIAL CLOCK INPUT INTERFACE

The CLKx /nCLKx accepts LVDS, LVPECL, LVHSTL, SSTL,

HCSL and other differential signals. Both VSWING and VOH must

meet the VPP and VCMR input requirements. Figures 3A to 3D show

interface examples for the HiPerClockS CLKx/nCLKx input driven

by the most common driver types. The input interfaces suggested

FIGURE 3A. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY

IDT HIPERCLOCKS LVHSTL DRIVER

here are examples only. Please consult with the vendor of the

driver component to conﬁrm the driver termination requirements.

For example in Figure 3A, the input termination applies for IDT

HiPerClockS LVHSTL drivers. If you are using an LVHSTL driver

from another vendor, use their termination recommendation.

1.8V

Input

LVHSTL Driver

ICS

HiPerClockS

LVHSTL

3.3V

Zo = 50 Ohm

HiPerClockS

CLK

nCLK

Zo = 50 Ohm

100

3.3V

LVDS_Driv er

Zo = 50 Ohm

Receiv er

CLK

nCLK

3.3V

INPUTS:

CLK/nCLK INPUT:

For applications not requiring the use of the differential input, both

CLK and nCLK can be left ﬂoating. Though not required, but for

additional protection, a 1k

Ω resistor can be tied from CLK to ground.

LVCMOS CONTROL PINS:

All control pins have internal pull-ups or pull-downs; additional

resistance is not required but can be added for additional protection.

A 1k

Ω resistor can be used.

RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS

OUTPUTS:

LVPECL OUTPUT

All unused LVPECL outputs can be left ﬂoating. We recommend

that there is no trace attached. Both sides of the differential output

pair should either be left ﬂoating or terminated.

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