L9969S datasheet(55/70 Pages) STMICROELECTRONICS

55 / 70 page

Symbol

Parameter

Condition

Min Typ

Max

Unit

IPUDIS

Pullup current

0 V < VDISx < 2.1 V 50 100

150

µA

IDISx

input current VDIS > 3.0 V (without Pull Up)

-5

µA

CDIS

Input capacity

tDIS

DIS pulse width pin DIS requires min. low level pulse width for

setting/resetting SPI bits or diagnostic information

0.5

1.5

µs

Disturbance of input pin

∆Vx_L

∆Vx_H

Change of input low or high level of input pins in case of

inverse current on VS

-0.1

0.1

∆Ix

Change of input low or high level of input pins in case of

inverse current on VS

-100

100

µA

3.2.7.9

TEST pin

TEST pin is a high-voltage-driven input, exclusively used to provide one of the mandatory conditions in order to

enter IC factory test-mode; externally providing a minimum required voltage value to TEST pin is not enough to

successfully enter IC test-mode, as many other software conditions have to be met as well.

TEST pin input circuitry is provided with an internal resistive pull-down path to AGNDx ground, ensuring that input

buffer does not provide wrong/uncertain information to the logic section in case TEST pin is left floating; thus, in

ECU normal operation scenario, TEST pin can be either left open or connected to AGNDx ground (suggested

implementation).

Table 44. TEST pin electrical characteristics

Symbol

Parameter

Condition Min Typ Max Unit

VTEST_NOTM_MAX

TEST pin maximum allowed voltage in order to avoid IC

test-mode activation

TEST

L9969x

Functional behavior in detail

DS14029 - Rev 3

page 55/70

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