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CPS-8 Datasheet(PDF) 1 Page - Renesas Technology Corp |
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CPS-8 Datasheet(HTML) 1 Page - Renesas Technology Corp |
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1 / 48 page  1 of 47 March 31, 2008 DSC 5697 1 Device Overview The CPS-8, device number IDT80KSW0003, is a serial RapidIO (sRIO) switch whose functionality is central to routing packets for distribution among DSPs, processors, FPGAs, other switches, or any other sRIO-based devices. It may also be used in serial RapidIO backplane switching. The CPS-8 supports serial RapidIO packet switching (unicast, multicast, and an optional broadcast) from any of its 8 input ports to any of its 8 output ports. 2 Features u Interfaces - sRIO – 8 bidirectional serial RapidIO (sRIO) lanes v 1.3 – Port Speeds selectable: 3.125Gbps, 2.5Gbps, or 1.25Gbps – All lanes support short haul or long haul reach for each PHY speed – Configurable port count to up to eight 1x ports, two 4x ports, or 4 1x and 1 4x ports – Lanes can be configured as individual non-redundant 1x ports, as part of a redundant 1x port, or as part of a 4x port – Support for two separate port rates for each quad – Supports standard 4 levels of priority – Error management support u Interfaces - I2C – Provides I2C port for maintenance and error reporting – Master or Slave Operation – Master allows power-on configuration from external ROM – Master mode configuration with external image compressing and checksum u Performance – 20 Gbps of peak switching bandwidth – Non-blocking data flow architecture within each sRIO priority – Very low latency for all packet length and load condition – Internal queuing buffer and retransmit buffer – Standard receiver based physical layer flow control u Features – Configurable for Cut Through or Store And Forward data flow – Device configurable through any of sRIO ports, I2C, or JTAG – Packet Trace. Each port provides the ability to match the first 160 bits of any packet against up to 4 programmable comparison values to copy the packet to a programmable output trace port – Packet Filter. Each port also provides the ability to filter the packet based on comparisons against these same 4 programmable values mentioned above – Supports up to 10 simultaneous multicast masks – Broadcast support – Port Loopback Debug Feature – Software assisted error recovery, supporting hot swap – Ports may be individually turned off to reduce power – PMON counters for monitor and diagnostics. Per input port and output port counters – SerDes physical diagnostic registers – Embedded PRBS generation and detection with programmable poly- nomials support Bit Error Rate (BER) testing – 0.13um technology – Low power dissipation – Full JTAG Boundary Scan Support (IEEE1149.1 & 1149.6) – Package: 324-ball grid array, 19mm x 19mm, 1.0mm ball pitch 3 Block Diagram Figure 1 Block diagram Datasheet 80KSW0003 8-Port Serial RapidIO® Switch S er ial R a pidIO S w itc h sR I O E n ha n c ed Qu a d ( up t o 4 por t s ) sR I O E n ha n c ed Q uad ( up t o 4 por t s ) Ln 0 Ln 1 Ln 2 Ln 3 Ln 4 Ln 5 Ln 6 Ln 7 M ai nt en anc e & Er r o r M a nag em en t C onf i gur at i o n JT A G I 2 C |
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Similar Description - CPS-8 |
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