STWBC2-HP datasheet(9/96 Pages) STMICROELECTRONICS

9 / 96 page

Figure 9. Buck/boost topologies

The BB-DCDC controller (see 2.1.3 Buck Boost DC-DC analog section) requires the following circuit from analog

domain:

Figure 10. BB DC-DC analog section

2.1.4

Analog monitors

The STWBC2-HP AFE integrates 3 analog mux that are connected to STM32G071 die ADC inputs. Each mux

selects a signal provided by an analog monitor cell. The mux switch time is fast enough allowing high speed

conversion time from STM32 die.

3 multiplexers are in use:

•

ADC0: this is the mux used for general purpose measurements

•

ADC1: this mux is either used as general purpose or to provide the voltage demodulation analog form.

•

ADC2: this mux is either used as general purpose or to provide the current demodulation analog form.

The channel selection (Sel_adcX[2:0]) is provided using SPI registers; selection is either directly applied to the

mux or through a latch. This is configured using SPI register (Latch_adcX). When the channel selection is using

latch mode, the Adc_mux_trig signal is used to latch the selection. The Adc_mux_trig signal comes from STM32

die GPIO. When using latch mode, the FW can prepare the next mux selection by accessing SPI registers while

an ADC conversion is on-going. This selection is applied only after the Adc_mux_trig GPIO toggling. In this way,

the SPI access time can be pipelined with the ADC conversion which improves the overall timing for multiple

channel conversion. The internal signals are shipped to the STM32 ADC input with the necessary rescaling and

gain to fit the ADC conversion range.

STWBC2-HP

Analog AFE functions

DS13825 - Rev 1.0

page 9/96

STWBC2-HP Datasheet(PDF) 9 Page - STMicroelectronics