AM625 datasheet(9/256 Pages) TI

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• (System Timing): Removed the Timing Conditions table from this section and added separate Timing

Conditions tables to each of the Reset Timing, Error Signal Timing, and Clock Timing sections...................109

• (Reset Timing): Added Timing Conditions table to define conditions specific to reset inputs and outputs..... 109

• (MCU_RESETSTATz, and RESETSTATz Switching Characteristics): Changed the minimum value of

parameter RST8 from "4040*S" to "966*S" and the minimum value of parameter RST9 from "301200" to

"4040*S"......................................................................................................................................................... 109

• (MCU_RESETSTATz, and RESETSTATz Switching Characteristics): Changed the minimum value of

parameter RST13 from "0" to "960"................................................................................................................109

• (RESETSTATz Switching Characteristics): Changed the minimum value of parameter RST16 from "T" to

"900*T", the minimum value of parameter RST17 from "W" to "4040*S", and replaced the contents of table

note 2..............................................................................................................................................................109

• (PORz_OUT Switching Characteristics): Changed the minimum value of parameter RST26 from "0" to

"1200"............................................................................................................................................................. 109

• (Error Signal Timing): Added Timing Conditions table to define conditions specific to MCU_ERRORn output...

........................................................................................................................................................................ 114

• (MCU_ERRORn Switching Characteristics): Changed "RST22" to "ERR" in table note 5............................. 114

• (Clock Timing): Added Timing Conditions table to define conditions specific to clock inputs and outputs......115

• (Clock Timing Requirements): Added cycle time and pulse duration parameters for AUDIO_EXT_REFCLK0

and AUDIO_EXT_REFCLK1...........................................................................................................................115

• (Clock Switching Characteristics): Added cycle time and pulse duration parameters for WKUP_CLKOUT0,

AUDIO_EXT_REFCLK0 and AUDIO_EXT_REFCLK1...................................................................................115

• (Input Clocks / Oscillators): Added WKUP_LFOSC0 and AUDIO_EXT_REFCLK[1:0] inputs and updated the

descriptions.....................................................................................................................................................117

• (MCU_OSC0 Internal Oscillator Clock Source): Added a note to define the maximum ESRxtal value based on

the Cshunt parameter........................................................................................................................................118

• (MCU_OSC0 Internal Oscillator Clock Source): Removed support for 24 MHz and 26 MHz reference clock

frequencies......................................................................................................................................................118

• (WKUP_LFOSC0 Start-up Time): Changed the power supply name "VDD_WKUP" to "VDD_CORE" and the

power supply name "VDDA_WKUP" to "VDDS_OSC0".................................................................................122

• (Output Clocks): Added WKUP_CLKOUT0 and AUDIO_EXT_REFCLK[1:0] outputs, and updated the

descriptions.....................................................................................................................................................125

• (PLLs): Removed R5F PLL, and added SMS PLL, DSS0 PLL, and DSS1 PLL.............................................125

• (PLLs): Replaced notes with paragraphs that introduces important design considerations and provides

appropriate references....................................................................................................................................125

• (Clock Specifications): Included an new section titled "Recommended System Precautions for Clock and

Control Signal Transitions"..............................................................................................................................126

• (RGMII[x]_TD[3:0] and RGMII[x]_TX_CTL Switching Characteristics – RGMII Mode): Added a note that

explains why output delay parameters are being defined as output setup and output hold........................... 130

• (CPTS): Added a note that explains timing limitations associated with valid pin combinations (IOSETs), and

provide a link to the SysConfig-PinMux Tool which defines valid IOSETs...................................................... 133

• (CSI-2): Added new section to Peripherals Timing and Switching Characteristics.........................................134

• Updated introduction to include a list of GPIO modules and updated content of the note............................. 144

• (GPIO Timing Conditions): Changed the minimum Input Slew rate for the LVCMOS buffer type, and defined

Input Slew Rate values for the I2C OD FS buffer type................................................................................... 144

• (GPIO Timing Requirements): Changed the "BUFFER TYPE" column to "MODE", replaced buffer types with

operating voltage, retained the minimum pulse width value for 1.8-V mode, and changed the minimum pulse

width value for 3.3-V mode............................................................................................................................. 144

• (GPMC Timing Conditions): Changed the minimum Output Load Capacitance from 5 pF to 2 pF................ 145

• (GPMC and NAND Flash — Asynchronous Mode): Removing the TBD maximum value from the "Pulse

duration, output write enable GPMC_WEn valid (tw(wenV))" parameter since a maximum value is not

applicable for this parameter.......................................................................................................................... 162

• (I2C Timing): Removed all timing parameter tables and diagrams, and referenced the Philips I2C-bus™

specification version 2.1 as the source for this information............................................................................ 166

• (I2C Timing): Added per port descriptions that define each speed mode supported and included additional

information that details exceptions to the I2C specification............................................................................ 166

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AM625, AM623

SPRSP58A – JUNE 2022 – REVISED NOVEMBER 2022

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