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AM625 Datasheet(PDF) 10 Page - Texas Instruments

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Part # AM625
Description  AM62x Sitara™ Processors
PDF  256 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM625 Datasheet(HTML) 10 Page - Texas Instruments

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• (I2C): Added a note that explains timing limitations associated with valid pin combinations (IOSETs), and
provide a link to the SysConfig-PinMux Tool which defines valid IOSETs...................................................... 166
• (MCASP): Added a note that explains timing limitations associated with valid pin combinations (IOSETs), and
provide a link to the SysConfig-PinMux Tool which defines valid IOSETs...................................................... 168
• (MCSPI): Added a note that explains timing limitations associated with valid pin combinations (IOSETs), and
provide a link to the SysConfig-PinMux Tool which defines valid IOSETs...................................................... 172
• (MMC0 Timing Conditions): Added Input slew rate for UHS-I DDR50............................................................178
• (OLDI0 Switching Characteristics): Replaced all instances of "BOOSTA_EN" with "Slow" or " Fast" in the
"MODE" column, and added notes with references that explain the requirements for configuring slow or fast
mode...............................................................................................................................................................199
• (OLDI0 Switching Characteristics): Changed the minimum cycle time from 5.8 ns to 6.06 ns.......................199
• (OSPI Switching Characteristics – PHY Data Training): Defined values for all previously undefined TBD
values............................................................................................................................................................. 202
• (OSPI0 Timing Requirements – PHY SDR Mode): Updated all setup and hold values..................................204
• (OSPI0 Switching Characteristics – Tap DDR Mode): Changed the "OSPI_RD_DATA_CAPTURE_REG" bit
field from "DELAY_FLD" to "DDR_READ_DELAY_FLD" in the note associated with parameter O6.............210
• (PRUSS): Added a note that explains timing limitations associated with valid pin combinations (IOSETs), and
provide a link to the SysConfig-PinMux Tool which defines valid IOSETs...................................................... 212
• (PRUSS UART Timing Conditions): Changed the minimum and maximum values for Input Slew Rate, and
added a note to the maximum output load capacitance value in the Timing Conditions table....................... 217
• (PRUSS UART Timing Conditions): Removed PCB Connectivity Requirements since UART does not have
any trace delay mismatch requirements......................................................................................................... 217
• (PRUSS UART Timing Requirements): Changed the description for each pulse width parameter, added a
note that clarifies the data valid time requirements for each parameter in the Timing Requirements table... 217
• (PRUSS UART Timing Requirements and Switching Characteristics): Updated the timing diagram to remove
CTS and show RXD timing relative to VIL and VIH .........................................................................................217
• (UART Timing Conditions): Added a note to the maximum output load capacitance value and removed PCB
Connectivity Requirements since UART does not have any trace delay mismatch requirements................. 220
• (UART Timing Requirements): Changed the start pulse width parameter description and added a note that
clarifies the data valid time requirements for each parameter in the Timing Requirements table.................. 220
• (UART Switching Characteristics): Added a new row for Programmable baud rate with different limits for Main
Domain and MCU/WKUP Domain UARTs......................................................................................................220
• (UART Switching Characteristics): Changed the start pulse width parameter description, removed the CTS
delay parameter, and removed the load capacitance references from the Programmable baud rate parameter
........................................................................................................................................................................220
• (UART Timing Requirements and Switching Characteristics): Updated the timing diagram to remove CTS and
show RXD timing relative to VIL and VIH ........................................................................................................220
• (Detailed Description): Updated entire section with new content................................................................... 222
• (Power Supply Designs): Changed section title from "Power Supply Decoupling and Bulk Capacitors" to
"Power Supply"............................................................................................................................................... 232
• (JTAG, EMU, and TRACE): Updated section title to include "TRACE"...........................................................232
• (JTAG, EMU, and TRACE): Added “JTAG”, “and TRACE” to the “For recommendations on …” Technical
Reference Manual reference sentence...........................................................................................................232
• (System Power Supply Monitor Design Guidelines): Updated maximum and minimum threshold values to
remove a few mV of rounding error in example provided............................................................................... 237
• (Standard Package Symbolization): Updated package symbolization figure to include centered and left-
justified text options........................................................................................................................................ 241
• (Device Naming Convention): Added speed grade "G" to the Device Naming Convention table...................242
• (Device Naming Convention): Removed Note 1, which contained repetitive information already provided in
the first paragraph of the Device Nomenclature section ................................................................................242
AM625, AM623
SPRSP58A – JUNE 2022 – REVISED NOVEMBER 2022
www.ti.com
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Product Folder Links: AM625 AM623



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